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authorTristan Gingold <tgingold@free.fr>2019-10-08 19:15:14 +0200
committerTristan Gingold <tgingold@free.fr>2019-10-08 19:15:14 +0200
commit8a0a30827ce0c9394c4d122028ebb65a35304895 (patch)
treea566b2f740659d884004714566d8b42cd92fd9d5 /testsuite/synth/dispvhdl01
parentf1e3878ee7360e59e1a8d068c25b4cfd46b86e93 (diff)
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testsuite/synth: add a test for the previous commit.
Diffstat (limited to 'testsuite/synth/dispvhdl01')
-rw-r--r--testsuite/synth/dispvhdl01/pkg.vhdl2
-rw-r--r--testsuite/synth/dispvhdl01/tb_vhd02.vhdl26
-rwxr-xr-xtestsuite/synth/dispvhdl01/testsuite.sh2
-rw-r--r--testsuite/synth/dispvhdl01/vhd02.vhdl13
4 files changed, 41 insertions, 2 deletions
diff --git a/testsuite/synth/dispvhdl01/pkg.vhdl b/testsuite/synth/dispvhdl01/pkg.vhdl
index 592226f79..c61ef3bce 100644
--- a/testsuite/synth/dispvhdl01/pkg.vhdl
+++ b/testsuite/synth/dispvhdl01/pkg.vhdl
@@ -2,7 +2,7 @@ library ieee;
use ieee.std_logic_1164.all;
package pkg is
- type myrec is record
+ type my_rec is record
b : std_logic;
end record;
end pkg;
diff --git a/testsuite/synth/dispvhdl01/tb_vhd02.vhdl b/testsuite/synth/dispvhdl01/tb_vhd02.vhdl
new file mode 100644
index 000000000..af68ad87b
--- /dev/null
+++ b/testsuite/synth/dispvhdl01/tb_vhd02.vhdl
@@ -0,0 +1,26 @@
+entity tb_vhd02 is
+end tb_vhd02;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use work.pkg.all;
+
+architecture behav of tb_vhd02 is
+ signal i1, o1 : my_rec;
+begin
+ dut: entity work.vhd02
+ port map (i1 => i1, o1 => o1);
+
+ process
+ begin
+ i1.b <= '1';
+ wait for 1 ns;
+ assert o1.b = '1' severity failure;
+
+ i1.b <= '0';
+ wait for 1 ns;
+ assert o1.b = '0' severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/dispvhdl01/testsuite.sh b/testsuite/synth/dispvhdl01/testsuite.sh
index 4c93e7067..e72e36771 100755
--- a/testsuite/synth/dispvhdl01/testsuite.sh
+++ b/testsuite/synth/dispvhdl01/testsuite.sh
@@ -2,7 +2,7 @@
. ../../testenv.sh
-for t in vhd01; do
+for t in vhd01 vhd02; do
analyze pkg.vhdl $t.vhdl tb_$t.vhdl
elab_simulate tb_$t
clean
diff --git a/testsuite/synth/dispvhdl01/vhd02.vhdl b/testsuite/synth/dispvhdl01/vhd02.vhdl
new file mode 100644
index 000000000..ddee5c316
--- /dev/null
+++ b/testsuite/synth/dispvhdl01/vhd02.vhdl
@@ -0,0 +1,13 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use work.pkg.all;
+
+entity vhd02 is
+ port (i1 : my_rec;
+ o1 : out my_rec);
+end vhd02;
+
+architecture behav of vhd02 is
+begin
+ o1 <= i1;
+end behav;