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authorTristan Gingold <tgingold@free.fr>2017-06-09 06:27:13 +0200
committerTristan Gingold <tgingold@free.fr>2017-06-09 06:27:13 +0200
commit5ba7861a7d065b1feb90de890ce34e837cb12fdf (patch)
treec8124cb5be61171e751ebd3ef58570c3c6c58913 /testsuite/gna/issue283/uut.vhd
parentdeb8888cec67e91b834f97b16cb29774d63e9c68 (diff)
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Add (disabled) testcase for #283
Diffstat (limited to 'testsuite/gna/issue283/uut.vhd')
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diff --git a/testsuite/gna/issue283/uut.vhd b/testsuite/gna/issue283/uut.vhd
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+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use ieee.numeric_std.all;
+
+entity foo is
+ port (
+ a : std_logic;
+ b : std_logic_vector(7 downto 0)
+ );
+end entity foo;
+
+architecture RTL of foo is
+
+ signal s_test : std_logic_vector(3 downto 0) := "1111";
+
+begin
+
+ cmp_bar: entity work.bar
+ port map(
+ a => a
+ );
+
+ gen_bars: for i in 0 to 1 generate
+ cmp_generated_bar: entity work.bar
+ port map(
+ a => a
+ );
+ end generate gen_bars;
+
+end architecture;