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| author | Tristan Gingold <tgingold@free.fr> | 2020-08-07 21:13:53 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-08-07 21:55:51 +0200 |
| commit | db12214157722a004cd951b40dd1bdf1449be200 (patch) | |
| tree | d24098401e5e70b9aacee6b960e076ce43dd4ebb /src/vhdl/vhdl-nodes.ads | |
| parent | cdc9c7a87a943e83901f56e1a1d5aa0c52b98daa (diff) | |
| download | ghdl-db12214157722a004cd951b40dd1bdf1449be200.tar.gz ghdl-db12214157722a004cd951b40dd1bdf1449be200.tar.bz2 ghdl-db12214157722a004cd951b40dd1bdf1449be200.zip | |
vhdl: recognize more std_logic_arith operators.
Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index adf3b6f59..a08e12d97 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5888,6 +5888,21 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Arith_Ext, Iir_Predefined_Ieee_Std_Logic_Arith_Sxt, + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Uns_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Sgn_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Neg_Sgn_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Abs_Sgn_Sgn, + + Iir_Predefined_Ieee_Std_Logic_Arith_Shl_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Shl_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Shr_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Shr_Sgn, + + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Uns_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Sgn_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Neg_Sgn_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Abs_Sgn_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns, Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn, Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn, |