diff options
author | Tristan Gingold <tgingold@free.fr> | 2020-08-07 21:13:53 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2020-08-07 21:55:51 +0200 |
commit | db12214157722a004cd951b40dd1bdf1449be200 (patch) | |
tree | d24098401e5e70b9aacee6b960e076ce43dd4ebb | |
parent | cdc9c7a87a943e83901f56e1a1d5aa0c52b98daa (diff) | |
download | ghdl-db12214157722a004cd951b40dd1bdf1449be200.tar.gz ghdl-db12214157722a004cd951b40dd1bdf1449be200.tar.bz2 ghdl-db12214157722a004cd951b40dd1bdf1449be200.zip |
vhdl: recognize more std_logic_arith operators.
-rw-r--r-- | python/libghdl/thin/std_names.py | 370 | ||||
-rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 244 | ||||
-rw-r--r-- | src/std_names.adb | 2 | ||||
-rw-r--r-- | src/std_names.ads | 6 | ||||
-rw-r--r-- | src/vhdl/vhdl-ieee-std_logic_arith.adb | 126 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 15 |
6 files changed, 436 insertions, 327 deletions
diff --git a/python/libghdl/thin/std_names.py b/python/libghdl/thin/std_names.py index f7bd4fef6..45c87a93e 100644 --- a/python/libghdl/thin/std_names.py +++ b/python/libghdl/thin/std_names.py @@ -621,187 +621,189 @@ class Name: Log2 = 833 Sin = 834 Cos = 835 - Ext = 836 - Sxt = 837 - Last_Ieee_Name = 837 - First_Synthesis = 838 - Allconst = 838 - Allseq = 839 - Anyconst = 840 - Anyseq = 841 - Last_Synthesis = 841 - First_Directive = 842 - Define = 842 - Endif = 843 - Ifdef = 844 - Ifndef = 845 - Include = 846 - Timescale = 847 - Undef = 848 - Protect = 849 - Begin_Protected = 850 - End_Protected = 851 - Key_Block = 852 - Data_Block = 853 - Line = 854 - Celldefine = 855 - Endcelldefine = 856 - Default_Nettype = 857 - Resetall = 858 - Last_Directive = 858 - First_Systask = 859 - Bits = 859 - D_Root = 860 - D_Unit = 861 - Last_Systask = 861 - First_SV_Method = 862 - Size = 862 - Insert = 863 - Delete = 864 - Pop_Front = 865 - Pop_Back = 866 - Push_Front = 867 - Push_Back = 868 - Name = 869 - Len = 870 - Substr = 871 - Exists = 872 - Atoi = 873 - Itoa = 874 - Find = 875 - Find_Index = 876 - Find_First = 877 - Find_First_Index = 878 - Find_Last = 879 - Find_Last_Index = 880 - Num = 881 - Randomize = 882 - Pre_Randomize = 883 - Post_Randomize = 884 - Srandom = 885 - Get_Randstate = 886 - Set_Randstate = 887 - Seed = 888 - State = 889 - Last_SV_Method = 889 - First_BSV = 890 - uAction = 890 - uActionValue = 891 - BVI = 892 - uC = 893 - uCF = 894 - uE = 895 - uSB = 896 - uSBR = 897 - Action = 898 - Endaction = 899 - Actionvalue = 900 - Endactionvalue = 901 - Ancestor = 902 - Clocked_By = 903 - Default_Clock = 904 - Default_Reset = 905 - Dependencies = 906 - Deriving = 907 - Determines = 908 - Enable = 909 - Ifc_Inout = 910 - Input_Clock = 911 - Input_Reset = 912 - Instance = 913 - Endinstance = 914 - Let = 915 - Match = 916 - Method = 917 - Endmethod = 918 - Numeric = 919 - Output_Clock = 920 - Output_Reset = 921 - Par = 922 - Endpar = 923 - Path = 924 - Provisos = 925 - Ready = 926 - Reset_By = 927 - Rule = 928 - Endrule = 929 - Rules = 930 - Endrules = 931 - Same_Family = 932 - Schedule = 933 - Seq = 934 - Endseq = 935 - Typeclass = 936 - Endtypeclass = 937 - Valueof = 938 - uValueof = 939 - Last_BSV = 939 - First_Comment = 940 - Psl = 940 - Pragma = 941 - Synthesis = 942 - Synopsys = 943 - Translate_Off = 944 - Translate_On = 945 - Translate = 946 - Synthesis_Off = 947 - Synthesis_On = 948 - Off = 949 - Last_Comment = 949 - First_PSL = 950 - A = 950 - Af = 951 - Ag = 952 - Ax = 953 - Abort = 954 - Assume_Guarantee = 955 - Before = 956 - Clock = 957 - E = 958 - Ef = 959 - Eg = 960 - Ex = 961 - Endpoint = 962 - Eventually = 963 - Fairness = 964 - Fell = 965 - Forall = 966 - G = 967 - Inf = 968 - Inherit = 969 - Never = 970 - Next_A = 971 - Next_E = 972 - Next_Event = 973 - Next_Event_A = 974 - Next_Event_E = 975 - Prev = 976 - Rose = 977 - Strong = 978 - W = 979 - Whilenot = 980 - Within = 981 - X = 982 - Last_PSL = 982 - First_Edif = 983 - Celltype = 993 - View = 994 - Viewtype = 995 - Direction = 996 - Contents = 997 - Net = 998 - Viewref = 999 - Cellref = 1000 - Libraryref = 1001 - Portinstance = 1002 - Joined = 1003 - Portref = 1004 - Instanceref = 1005 - Design = 1006 - Designator = 1007 - Owner = 1008 - Member = 1009 - Number = 1010 - Rename = 1011 - Userdata = 1012 - Last_Edif = 1012 + Shl = 836 + Shr = 837 + Ext = 838 + Sxt = 839 + Last_Ieee_Name = 839 + First_Synthesis = 840 + Allconst = 840 + Allseq = 841 + Anyconst = 842 + Anyseq = 843 + Last_Synthesis = 843 + First_Directive = 844 + Define = 844 + Endif = 845 + Ifdef = 846 + Ifndef = 847 + Include = 848 + Timescale = 849 + Undef = 850 + Protect = 851 + Begin_Protected = 852 + End_Protected = 853 + Key_Block = 854 + Data_Block = 855 + Line = 856 + Celldefine = 857 + Endcelldefine = 858 + Default_Nettype = 859 + Resetall = 860 + Last_Directive = 860 + First_Systask = 861 + Bits = 861 + D_Root = 862 + D_Unit = 863 + Last_Systask = 863 + First_SV_Method = 864 + Size = 864 + Insert = 865 + Delete = 866 + Pop_Front = 867 + Pop_Back = 868 + Push_Front = 869 + Push_Back = 870 + Name = 871 + Len = 872 + Substr = 873 + Exists = 874 + Atoi = 875 + Itoa = 876 + Find = 877 + Find_Index = 878 + Find_First = 879 + Find_First_Index = 880 + Find_Last = 881 + Find_Last_Index = 882 + Num = 883 + Randomize = 884 + Pre_Randomize = 885 + Post_Randomize = 886 + Srandom = 887 + Get_Randstate = 888 + Set_Randstate = 889 + Seed = 890 + State = 891 + Last_SV_Method = 891 + First_BSV = 892 + uAction = 892 + uActionValue = 893 + BVI = 894 + uC = 895 + uCF = 896 + uE = 897 + uSB = 898 + uSBR = 899 + Action = 900 + Endaction = 901 + Actionvalue = 902 + Endactionvalue = 903 + Ancestor = 904 + Clocked_By = 905 + Default_Clock = 906 + Default_Reset = 907 + Dependencies = 908 + Deriving = 909 + Determines = 910 + Enable = 911 + Ifc_Inout = 912 + Input_Clock = 913 + Input_Reset = 914 + Instance = 915 + Endinstance = 916 + Let = 917 + Match = 918 + Method = 919 + Endmethod = 920 + Numeric = 921 + Output_Clock = 922 + Output_Reset = 923 + Par = 924 + Endpar = 925 + Path = 926 + Provisos = 927 + Ready = 928 + Reset_By = 929 + Rule = 930 + Endrule = 931 + Rules = 932 + Endrules = 933 + Same_Family = 934 + Schedule = 935 + Seq = 936 + Endseq = 937 + Typeclass = 938 + Endtypeclass = 939 + Valueof = 940 + uValueof = 941 + Last_BSV = 941 + First_Comment = 942 + Psl = 942 + Pragma = 943 + Synthesis = 944 + Synopsys = 945 + Translate_Off = 946 + Translate_On = 947 + Translate = 948 + Synthesis_Off = 949 + Synthesis_On = 950 + Off = 951 + Last_Comment = 951 + First_PSL = 952 + A = 952 + Af = 953 + Ag = 954 + Ax = 955 + Abort = 956 + Assume_Guarantee = 957 + Before = 958 + Clock = 959 + E = 960 + Ef = 961 + Eg = 962 + Ex = 963 + Endpoint = 964 + Eventually = 965 + Fairness = 966 + Fell = 967 + Forall = 968 + G = 969 + Inf = 970 + Inherit = 971 + Never = 972 + Next_A = 973 + Next_E = 974 + Next_Event = 975 + Next_Event_A = 976 + Next_Event_E = 977 + Prev = 978 + Rose = 979 + Strong = 980 + W = 981 + Whilenot = 982 + Within = 983 + X = 984 + Last_PSL = 984 + First_Edif = 985 + Celltype = 995 + View = 996 + Viewtype = 997 + Direction = 998 + Contents = 999 + Net = 1000 + Viewref = 1001 + Cellref = 1002 + Libraryref = 1003 + Portinstance = 1004 + Joined = 1005 + Portref = 1006 + Instanceref = 1007 + Design = 1008 + Designator = 1009 + Owner = 1010 + Member = 1011 + Number = 1012 + Rename = 1013 + Userdata = 1014 + Last_Edif = 1014 diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 32e07a6c5..b7fdf7ea8 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1465,122 +1465,134 @@ class Iir_Predefined: Ieee_Std_Logic_Arith_Conv_Vector_Log = 468 Ieee_Std_Logic_Arith_Ext = 469 Ieee_Std_Logic_Arith_Sxt = 470 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 471 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 472 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 473 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 474 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 475 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 476 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 477 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 478 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 479 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 480 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 481 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 482 - Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 483 - Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 484 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 485 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 486 - Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 487 - Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 488 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 489 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 490 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 491 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 492 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 493 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 494 - Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 495 - Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 496 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 497 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 498 - Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 499 - Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 500 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 501 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 502 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 503 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 504 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 505 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 506 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 507 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 508 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 509 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 510 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 511 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 512 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 513 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 514 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 515 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 516 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 517 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 518 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 519 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 520 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 521 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 522 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 523 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 524 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 525 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 526 - Ieee_Std_Logic_Arith_Lt_Uns_Uns = 527 - Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 528 - Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 529 - Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 530 - Ieee_Std_Logic_Arith_Lt_Uns_Int = 531 - Ieee_Std_Logic_Arith_Lt_Int_Uns = 532 - Ieee_Std_Logic_Arith_Lt_Sgn_Int = 533 - Ieee_Std_Logic_Arith_Lt_Int_Sgn = 534 - Ieee_Std_Logic_Arith_Le_Uns_Uns = 535 - Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 536 - Ieee_Std_Logic_Arith_Le_Uns_Sgn = 537 - Ieee_Std_Logic_Arith_Le_Sgn_Uns = 538 - Ieee_Std_Logic_Arith_Le_Uns_Int = 539 - Ieee_Std_Logic_Arith_Le_Int_Uns = 540 - Ieee_Std_Logic_Arith_Le_Sgn_Int = 541 - Ieee_Std_Logic_Arith_Le_Int_Sgn = 542 - Ieee_Std_Logic_Arith_Gt_Uns_Uns = 543 - Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 544 - Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 545 - Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 546 - Ieee_Std_Logic_Arith_Gt_Uns_Int = 547 - Ieee_Std_Logic_Arith_Gt_Int_Uns = 548 - Ieee_Std_Logic_Arith_Gt_Sgn_Int = 549 - Ieee_Std_Logic_Arith_Gt_Int_Sgn = 550 - Ieee_Std_Logic_Arith_Ge_Uns_Uns = 551 - Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 552 - Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 553 - Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 554 - Ieee_Std_Logic_Arith_Ge_Uns_Int = 555 - Ieee_Std_Logic_Arith_Ge_Int_Uns = 556 - Ieee_Std_Logic_Arith_Ge_Sgn_Int = 557 - Ieee_Std_Logic_Arith_Ge_Int_Sgn = 558 - Ieee_Std_Logic_Arith_Eq_Uns_Uns = 559 - Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 560 - Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 561 - Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 562 - Ieee_Std_Logic_Arith_Eq_Uns_Int = 563 - Ieee_Std_Logic_Arith_Eq_Int_Uns = 564 - Ieee_Std_Logic_Arith_Eq_Sgn_Int = 565 - Ieee_Std_Logic_Arith_Eq_Int_Sgn = 566 - Ieee_Std_Logic_Arith_Ne_Uns_Uns = 567 - Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 568 - Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 569 - Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 570 - Ieee_Std_Logic_Arith_Ne_Uns_Int = 571 - Ieee_Std_Logic_Arith_Ne_Int_Uns = 572 - Ieee_Std_Logic_Arith_Ne_Sgn_Int = 573 - Ieee_Std_Logic_Arith_Ne_Int_Sgn = 574 - Ieee_Std_Logic_Misc_And_Reduce_Slv = 575 - Ieee_Std_Logic_Misc_And_Reduce_Suv = 576 - Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 577 - Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 578 - Ieee_Std_Logic_Misc_Or_Reduce_Slv = 579 - Ieee_Std_Logic_Misc_Or_Reduce_Suv = 580 - Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 581 - Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 582 - Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 583 - Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 584 - Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 585 - Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 586 + Ieee_Std_Logic_Arith_Id_Uns_Uns = 471 + Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 472 + Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 473 + Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 474 + Ieee_Std_Logic_Arith_Shl_Uns = 475 + Ieee_Std_Logic_Arith_Shl_Sgn = 476 + Ieee_Std_Logic_Arith_Shr_Uns = 477 + Ieee_Std_Logic_Arith_Shr_Sgn = 478 + Ieee_Std_Logic_Arith_Id_Uns_Slv = 479 + Ieee_Std_Logic_Arith_Id_Sgn_Slv = 480 + Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 481 + Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 482 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 483 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 484 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 485 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 486 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 487 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 488 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 489 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 490 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 491 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 492 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 493 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 494 + Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 495 + Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 496 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 497 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 498 + Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 499 + Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 500 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 501 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 502 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 503 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 504 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 505 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 506 + Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 507 + Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 508 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 509 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 510 + Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 511 + Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 512 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 513 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 514 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 515 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 516 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 517 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 518 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 519 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 520 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 521 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 522 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 523 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 524 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 525 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 526 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 527 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 528 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 529 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 530 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 531 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 532 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 533 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 534 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 535 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 536 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 537 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 538 + Ieee_Std_Logic_Arith_Lt_Uns_Uns = 539 + Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 540 + Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 541 + Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 542 + Ieee_Std_Logic_Arith_Lt_Uns_Int = 543 + Ieee_Std_Logic_Arith_Lt_Int_Uns = 544 + Ieee_Std_Logic_Arith_Lt_Sgn_Int = 545 + Ieee_Std_Logic_Arith_Lt_Int_Sgn = 546 + Ieee_Std_Logic_Arith_Le_Uns_Uns = 547 + Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 548 + Ieee_Std_Logic_Arith_Le_Uns_Sgn = 549 + Ieee_Std_Logic_Arith_Le_Sgn_Uns = 550 + Ieee_Std_Logic_Arith_Le_Uns_Int = 551 + Ieee_Std_Logic_Arith_Le_Int_Uns = 552 + Ieee_Std_Logic_Arith_Le_Sgn_Int = 553 + Ieee_Std_Logic_Arith_Le_Int_Sgn = 554 + Ieee_Std_Logic_Arith_Gt_Uns_Uns = 555 + Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 556 + Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 557 + Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 558 + Ieee_Std_Logic_Arith_Gt_Uns_Int = 559 + Ieee_Std_Logic_Arith_Gt_Int_Uns = 560 + Ieee_Std_Logic_Arith_Gt_Sgn_Int = 561 + Ieee_Std_Logic_Arith_Gt_Int_Sgn = 562 + Ieee_Std_Logic_Arith_Ge_Uns_Uns = 563 + Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 564 + Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 565 + Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 566 + Ieee_Std_Logic_Arith_Ge_Uns_Int = 567 + Ieee_Std_Logic_Arith_Ge_Int_Uns = 568 + Ieee_Std_Logic_Arith_Ge_Sgn_Int = 569 + Ieee_Std_Logic_Arith_Ge_Int_Sgn = 570 + Ieee_Std_Logic_Arith_Eq_Uns_Uns = 571 + Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 572 + Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 573 + Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 574 + Ieee_Std_Logic_Arith_Eq_Uns_Int = 575 + Ieee_Std_Logic_Arith_Eq_Int_Uns = 576 + Ieee_Std_Logic_Arith_Eq_Sgn_Int = 577 + Ieee_Std_Logic_Arith_Eq_Int_Sgn = 578 + Ieee_Std_Logic_Arith_Ne_Uns_Uns = 579 + Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 580 + Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 581 + Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 582 + Ieee_Std_Logic_Arith_Ne_Uns_Int = 583 + Ieee_Std_Logic_Arith_Ne_Int_Uns = 584 + Ieee_Std_Logic_Arith_Ne_Sgn_Int = 585 + Ieee_Std_Logic_Arith_Ne_Int_Sgn = 586 + Ieee_Std_Logic_Misc_And_Reduce_Slv = 587 + Ieee_Std_Logic_Misc_And_Reduce_Suv = 588 + Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 589 + Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 590 + Ieee_Std_Logic_Misc_Or_Reduce_Slv = 591 + Ieee_Std_Logic_Misc_Or_Reduce_Suv = 592 + Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 593 + Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 594 + Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 595 + Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 596 + Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 597 + Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 598 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/std_names.adb b/src/std_names.adb index f633f3fbf..8855b3b75 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -672,6 +672,8 @@ package body Std_Names is Def ("log2", Name_Log2); Def ("sin", Name_Sin); Def ("cos", Name_Cos); + Def ("shl", Name_Shl); + Def ("shr", Name_Shr); Def ("ext", Name_Ext); Def ("sxt", Name_Sxt); diff --git a/src/std_names.ads b/src/std_names.ads index 31ddfb621..1bcc6943d 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -755,8 +755,10 @@ package Std_Names is Name_Log2 : constant Name_Id := Name_First_Ieee_Name + 042; Name_Sin : constant Name_Id := Name_First_Ieee_Name + 043; Name_Cos : constant Name_Id := Name_First_Ieee_Name + 044; - Name_Ext : constant Name_Id := Name_First_Ieee_Name + 045; - Name_Sxt : constant Name_Id := Name_First_Ieee_Name + 046; + Name_Shl : constant Name_Id := Name_First_Ieee_Name + 045; + Name_Shr : constant Name_Id := Name_First_Ieee_Name + 046; + Name_Ext : constant Name_Id := Name_First_Ieee_Name + 047; + Name_Sxt : constant Name_Id := Name_First_Ieee_Name + 048; Name_Last_Ieee_Name : constant Name_Id := Name_Sxt; Name_First_Synthesis : constant Name_Id := Name_Last_Ieee_Name + 1; diff --git a/src/vhdl/vhdl-ieee-std_logic_arith.adb b/src/vhdl/vhdl-ieee-std_logic_arith.adb index ded3ff0c3..05c83ab68 100644 --- a/src/vhdl/vhdl-ieee-std_logic_arith.adb +++ b/src/vhdl/vhdl-ieee-std_logic_arith.adb @@ -27,6 +27,8 @@ package body Vhdl.Ieee.Std_Logic_Arith is Unsigned_Type : Iir := Null_Iir; Signed_Type : Iir := Null_Iir; + Error : exception; + type Arg_Kind is (Type_Slv, Type_Signed, Type_Unsigned, Type_Int, Type_Log); subtype Conv_Arg_Kind is Arg_Kind range Type_Signed .. Type_Log; @@ -331,28 +333,89 @@ package body Vhdl.Ieee.Std_Logic_Arith is Type_Signed => Iir_Predefined_Ieee_Std_Logic_Arith_Ne_Int_Sgn, others => Iir_Predefined_None)); - Error : exception; + procedure Classify_Arg (Arg : Iir; Kind : out Arg_Kind) + is + Arg_Type : constant Iir := Get_Type (Arg); + begin + if Arg_Type = Signed_Type then + Kind := Type_Signed; + elsif Arg_Type = Unsigned_Type then + Kind := Type_Unsigned; + elsif Arg_Type = Vhdl.Std_Package.Integer_Subtype_Definition then + Kind := Type_Int; + elsif Arg_Type = Ieee.Std_Logic_1164.Std_Ulogic_Type then + Kind := Type_Log; + elsif Arg_Type = Ieee.Std_Logic_1164.Std_Logic_Vector_Type then + Kind := Type_Slv; + else + raise Error; + end if; + end Classify_Arg; + + function Handle_Unary (Decl : Iir; Arg : Arg_Kind) + return Iir_Predefined_Functions + is + Res_Kind : Arg_Kind; + begin + case Get_Identifier (Decl) is + when Name_Conv_Integer => + return Conv_Int_Patterns (Arg); + when Name_Op_Plus => + Classify_Arg (Decl, Res_Kind); + case Arg is + when Type_Unsigned => + case Res_Kind is + when Type_Unsigned => + return Iir_Predefined_Ieee_Std_Logic_Arith_Id_Uns_Uns; + when Type_Slv => + return Iir_Predefined_Ieee_Std_Logic_Arith_Id_Uns_Slv; + when others => + null; + end case; + when Type_Signed => + case Res_Kind is + when Type_Signed => + return Iir_Predefined_Ieee_Std_Logic_Arith_Id_Sgn_Sgn; + when Type_Slv => + return Iir_Predefined_Ieee_Std_Logic_Arith_Id_Sgn_Slv; + when others => + null; + end case; + when others => + null; + end case; + when Name_Op_Minus => + Classify_Arg (Decl, Res_Kind); + if Arg = Type_Signed then + case Res_Kind is + when Type_Signed => + return Iir_Predefined_Ieee_Std_Logic_Arith_Neg_Sgn_Sgn; + when Type_Slv => + return Iir_Predefined_Ieee_Std_Logic_Arith_Neg_Sgn_Slv; + when others => + null; + end case; + end if; + when Name_Abs => + Classify_Arg (Decl, Res_Kind); + if Arg = Type_Signed then + case Res_Kind is + when Type_Signed => + return Iir_Predefined_Ieee_Std_Logic_Arith_Abs_Sgn_Sgn; + when Type_Slv => + return Iir_Predefined_Ieee_Std_Logic_Arith_Abs_Sgn_Slv; + when others => + null; + end case; + end if; + when others => + null; + end case; + return Iir_Predefined_None; + end Handle_Unary; procedure Extract_Declarations (Pkg : Iir_Package_Declaration) is - procedure Classify_Arg (Arg : Iir; Kind : out Arg_Kind) - is - Arg_Type : constant Iir := Get_Type (Arg); - begin - if Arg_Type = Signed_Type then - Kind := Type_Signed; - elsif Arg_Type = Unsigned_Type then - Kind := Type_Unsigned; - elsif Arg_Type = Vhdl.Std_Package.Integer_Subtype_Definition then - Kind := Type_Int; - elsif Arg_Type = Ieee.Std_Logic_1164.Std_Ulogic_Type then - Kind := Type_Log; - elsif Arg_Type = Ieee.Std_Logic_1164.Std_Logic_Vector_Type then - Kind := Type_Slv; - else - raise Error; - end if; - end Classify_Arg; Decl : Iir; Type_Def : Iir; @@ -484,17 +547,30 @@ package body Vhdl.Ieee.Std_Logic_Arith is raise Error; end if; Def := Iir_Predefined_Ieee_Std_Logic_Arith_Sxt; + when Name_Shl => + if Arg2_Kind /= Type_Unsigned then + raise Error; + end if; + if Arg1_Kind = Type_Unsigned then + Def := Iir_Predefined_Ieee_Std_Logic_Arith_Shl_Uns; + elsif Arg1_Kind = Type_Signed then + Def := Iir_Predefined_Ieee_Std_Logic_Arith_Shl_Sgn; + end if; + when Name_Shr => + if Arg2_Kind /= Type_Unsigned then + raise Error; + end if; + if Arg1_Kind = Type_Unsigned then + Def := Iir_Predefined_Ieee_Std_Logic_Arith_Shr_Uns; + elsif Arg1_Kind = Type_Signed then + Def := Iir_Predefined_Ieee_Std_Logic_Arith_Shr_Sgn; + end if; when others => null; end case; else -- Monadic function. - case Get_Identifier (Decl) is - when Name_Conv_Integer => - Def := Conv_Int_Patterns (Arg1_Kind); - when others => - null; - end case; + Def := Handle_Unary (Decl, Arg1_Kind); end if; when Iir_Kind_Non_Object_Alias_Declaration diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index adf3b6f59..a08e12d97 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5888,6 +5888,21 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Arith_Ext, Iir_Predefined_Ieee_Std_Logic_Arith_Sxt, + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Uns_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Sgn_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Neg_Sgn_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Abs_Sgn_Sgn, + + Iir_Predefined_Ieee_Std_Logic_Arith_Shl_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Shl_Sgn, + Iir_Predefined_Ieee_Std_Logic_Arith_Shr_Uns, + Iir_Predefined_Ieee_Std_Logic_Arith_Shr_Sgn, + + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Uns_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Id_Sgn_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Neg_Sgn_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Abs_Sgn_Slv, + Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns, Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn, Iir_Predefined_Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn, |