diff options
| author | Tristan Gingold <tgingold@free.fr> | 2017-11-11 09:04:48 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2017-11-11 09:04:48 +0100 |
| commit | f589c5c13fb533aa3c29453a2916d1da6fec8e11 (patch) | |
| tree | bed23e1e2f23d2e3bce463987f4c959596a9f374 /src/vhdl/simulate/simulation.adb | |
| parent | e8a21ffe5226aad4970bd1facd4a3464a4b436f1 (diff) | |
| download | ghdl-f589c5c13fb533aa3c29453a2916d1da6fec8e11.tar.gz ghdl-f589c5c13fb533aa3c29453a2916d1da6fec8e11.tar.bz2 ghdl-f589c5c13fb533aa3c29453a2916d1da6fec8e11.zip | |
list: update simulator.
Diffstat (limited to 'src/vhdl/simulate/simulation.adb')
| -rw-r--r-- | src/vhdl/simulate/simulation.adb | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/vhdl/simulate/simulation.adb b/src/vhdl/simulate/simulation.adb index 52dc894d2..0d23a20f8 100644 --- a/src/vhdl/simulate/simulation.adb +++ b/src/vhdl/simulate/simulation.adb @@ -510,6 +510,7 @@ package body Simulation is Expr: Iir; El : Iir; List: Iir_List; + It : List_Iterator; Res: Iir_Value_Literal_Acc; Status : Boolean; Marker : Mark_Type; @@ -532,13 +533,12 @@ package body Simulation is -- occuring on any signal in the sensitivity set of the wait -- statement. List := Get_Sensitivity_List (Stmt); - if List /= Null_Iir_List then - for J in Natural loop - El := Get_Nth_Element (List, J); - exit when El = Null_Iir; - Wait_Add_Sensitivity (Execute_Name (Instance, El, True)); - end loop; - end if; + It := List_Iterate_Safe (List); + while Is_Valid (It) loop + El := Get_Element (It); + Wait_Add_Sensitivity (Execute_Name (Instance, El, True)); + Next (It); + end loop; -- LRM93 8.1 -- It also causes the execution of the corresponding process |
