diff options
| author | Tristan Gingold <tgingold@free.fr> | 2019-10-01 20:27:56 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-10-01 20:27:56 +0200 |
| commit | 8de90a32fbbdea13cd1269f9c3769a11487520f1 (patch) | |
| tree | 3c02cb6b832f6433f381192dcba737bb0923323e | |
| parent | c3bd820b4b43cc12672091e3c90a59554c050c50 (diff) | |
| download | ghdl-8de90a32fbbdea13cd1269f9c3769a11487520f1.tar.gz ghdl-8de90a32fbbdea13cd1269f9c3769a11487520f1.tar.bz2 ghdl-8de90a32fbbdea13cd1269f9c3769a11487520f1.zip | |
netlists-disp_vhdl: display constant signals connected to user submodules.
| -rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 64eb85044..3a5ca960c 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -374,6 +374,8 @@ package body Netlists.Disp_Vhdl is | Id_Dyn_Extract | Id_Dyn_Insert => return True; + when Id_User_None .. Module_Id'Last => + return True; when others => return False; end case; |