synth: handle string subtype defined by a port. Fix #958

2 files changed, 20 insertions, 7 deletions

diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index 886b2c46b..f87f8d77b 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -1469,7 +1469,8 @@ package body Synth.Expr is
       end if;
    end Error_Unknown_Operator;
 
-   function Synth_String_Literal (Syn_Inst : Synth_Instance_Acc; Str : Node)
+   function Synth_String_Literal
+     (Syn_Inst : Synth_Instance_Acc; Str : Node; Str_Typ : Type_Acc)
                                  return Value_Acc
    is
       pragma Assert (Get_Kind (Str) = Iir_Kind_String_Literal8);
@@ -1484,7 +1485,18 @@ package body Synth.Expr is
       Arr : Value_Array_Acc;
       Pos : Nat8;
    begin
-      Bounds := Synth_Array_Bounds (Syn_Inst, Str_Type, 0);
+      case Str_Typ.Kind is
+         when Type_Vector =>
+            Bounds := Str_Typ.Vbound;
+         when Type_Array =>
+            Bounds := Str_Typ.Abounds.D (1);
+         when Type_Unbounded_Vector
+           | Type_Unbounded_Array =>
+            Bounds := Synth_Array_Bounds (Syn_Inst, Str_Type, 0);
+         when others =>
+            raise Internal_Error;
+      end case;
+
       El_Type := Get_Value_Type (Syn_Inst, Get_Element_Subtype (Str_Type));
       if El_Type.Kind in Type_Nets then
          Res_Type := Create_Vector_Type (Bounds, El_Type);
@@ -1596,7 +1608,7 @@ package body Synth.Expr is
             return Create_Value_Discrete
               (Get_Physical_Value (Expr), Expr_Type);
          when Iir_Kind_String_Literal8 =>
-            return Synth_String_Literal (Syn_Inst, Expr);
+            return Synth_String_Literal (Syn_Inst, Expr, Expr_Type);
          when Iir_Kind_Enumeration_Literal =>
             return Synth_Name (Syn_Inst, Expr);
          when Iir_Kind_Type_Conversion =>
diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb
index 841cf75e2..4a1485ef3 100644
--- a/src/synth/synth-insts.adb
+++ b/src/synth/synth-insts.adb
@@ -259,6 +259,7 @@ package body Synth.Insts is
       O : Value_Acc;
       Nbr_Inputs : Port_Nbr;
       Nbr_Outputs : Port_Nbr;
+      Formal_Typ : Type_Acc;
    begin
       Assoc := Ports_Assoc;
       Assoc_Inter := Get_Port_Chain (Inst_Obj.Decl);
@@ -276,11 +277,13 @@ package body Synth.Insts is
                raise Internal_Error;
          end case;
 
+         Formal_Typ := Get_Value_Type (Inst_Obj.Syn_Inst, Get_Type (Inter));
          case Mode_To_Port_Kind (Get_Mode (Inter)) is
             when Port_In =>
                --  Connect the net to the input.
                Connect (Get_Input (Inst, Nbr_Inputs),
-                        Get_Net (Synth_Expression (Syn_Inst, Actual)));
+                        Get_Net (Synth_Expression_With_Type
+                                   (Syn_Inst, Actual, Formal_Typ)));
                Nbr_Inputs := Nbr_Inputs + 1;
             when Port_Out
               | Port_Inout =>
@@ -288,9 +291,7 @@ package body Synth.Insts is
                   --  Create a port gate (so that is has a name).
                   Port := Get_Output (Inst, Nbr_Outputs);
                   Port := Builders.Build_Port (Get_Build (Syn_Inst), Port);
-                  O := Create_Value_Net
-                    (Port, Get_Value_Type (Inst_Obj.Syn_Inst,
-                                           Get_Type (Inter)));
+                  O := Create_Value_Net (Port, Formal_Typ);
                   --  Assign the port output to the actual (a net).
                   Synth_Assignment (Syn_Inst, Actual, O, Assoc);
                end if;