| Commit message (Collapse) | Author | Age | Files | Lines |
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The anita-based NetBSD targets need noisy, per-target handling.
Factor it out into another Makefile.
Change-Id: I0a3ca751b42f1ca8c05d93eb9740bb0ee5cc6d09
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52483
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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emu_data *data is allocated in init function and needs
to be freed in shutdown function.
BUG=b:181803212
TEST=builds and ninja test
Change-Id: I36f76d84d3547d081c64857e06da23ee63cc5594
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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This reverts commit 5e5c3f15efe262ff23642dd543faf6a9dbb3bbdb.
Reason for revert: Breaks building on PowerPC, NetBSD, DJGPP, and it is
possible that SPARC fails to build as well.
Change-Id: I57b5125207de3fd156dface67cba605da893d6aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52425
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Move global singleton states into a struct and store within
the spi_master data field for the life-time of the driver.
This is one of the steps on the way to move spi_master data
memory management behind the initialisation API, for more
context see other patches under the same topic "register_master_api".
TEST=builds
BUG=b:185191942
Change-Id: If13ad0c979ccf62ca4ccbd479d471c657895ef59
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com>
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DOS (DJGPP 6.1.0) has no USB support.
Change-Id: I36ee1edfb0e5b8d4e2b099c0f7f8aac64ed7884f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52474
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Change-Id: I726006fe2c1780361bdf6f9a1ddd84da0733642d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52472
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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his ---> this
Change-Id: Ibcc04a1581b3ba0dcd86e6f900c146823ebcd84a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Once upon a time flashrom had a entry point function called
doit(). Excise the last mention of it here so that we may
never mention it again.
BUG=none
TEST=none
Change-Id: I40d815b7154456c323b4230cd3fed2cc2e8e3641
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This fixes building with musl libc on alpine:i386-v3.7.
Change-Id: Ibd478f3fcd6b6803098035dbdc47f72f6ab3fa6b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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A bit more details: since register_shutdown has moved a few lines
below, now ene_enter_flash_mode is called before the shutdown function
is registered. ene_enter_flash_mode can fail (at least in theory,
it has some return 1s), but its return value is not analyzed, so even if
it returns non-0, execution goes further and register_shutdown will
happen anyway.
It is a separate question whether the return value of
ene_enter_flash_mode needs to be analyzed or is it ok to ignore it,
but in this patch I plan to keep the same behaviour, and probably I
will get back to error handling later.
This unlocks API change which plans to move register_shutdown inside
register master API, see https://review.coreboot.org/c/flashrom/+/51761
TEST=builds
BUG=b:185191942
Change-Id: If89a758c91c77486adbac2779449bcd71ab8fc78
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Given that the buffer size is known in advance, using malloc() is not
necessary. To avoid open-coding buffer sizes, add some trailing null
characters to `I2C_DEV_PREFIX`, as placeholders for bus number digits.
Finally, replace the now-unnecessary `goto` statements with `return`.
Change-Id: I6060749c6ded10949344caee3cc3943306e74a1c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Reflow long lines, drop unnecessary parentheses, add spaces after `if`
and `while` keywords and add braces to a single-statement `else if`
block that follows a multi-statement `if` block.
TEST=Build with `make distclean && make VERSION=none -j` with and
without this patch, the flashrom executable does not change.
Change-Id: Iaa5277b12fca192c46c11f5e0f375dc43d06bf5c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Fix a few typos and a copy-paste error in log messages.
Change-Id: Ic69503f60a59aa0f4b991eaa2a7be40a7d9c1301
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Move global singleton states into a struct and store within
the spi_master data field for the life-time of the driver.
This is one of the steps on the way to move spi_master data
memory management behind the initialisation API, for more
context see other patches under the same topic "register_master_api".
TEST=builds
BUG=b:140394053
Change-Id: I93408c2ca846fca6a1c7eda7180862c51bd48078
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52285
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Shutdown function was covering two different jobs here:
1) the actual shutdown which is run at the end of the driver's
lifecycle and 2) cleanup in cases when initialisation failed.
Now, shutdown is only doing its main job (#1), and the driver
itself is doing cleanup when init fails (#2).
The good thing is that now resources are released/closed immediately
in cases when init fails (vs shutdown function which was run at some
point later), and the driver leaves clean space after itself if init fails.
And very importantly this unlocks API change which plans to move
register_shutdown inside register master API, see this
https://review.coreboot.org/c/flashrom/+/51761
TEST=builds
BUG=b:140394053
Change-Id: I1c8da2878cd0e85a1e43ba9b4b8e6f3d9f38ae5c
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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To get max_kernel_buf_size is a piece of logic on its own, it opens
resources and closes resources, also has some local variables only
for this task. Extracting get_max_kernel_buf_size() as a separate
function simplifies init flow and allows to remove global state from linux_spi
(see next patches in this chain).
TEST=builds
BUG=b:140394053
Change-Id: I4b8c5775fb8f4b0dff702fcc0fb258221254c659
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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While it's not posixly-correct, it's possible that a user, script, or
application may attempt to start flashrom with stdout or stderr
closed. It's possible that we'll get a file descriptor of 1 or 2 when
opening a flash device (such as Linux MTD), and flashrom will send
garbage debug logs to the flash:
# bash -c "exec >&- flashrom ..."
Observed corruption:
43 40 45 42 45 44 00 00 00 00 00 00 01 00 00 00 |C@EBED..........|
00 02 00 00 63 65 73 73 66 75 6c 6c 79 0a 46 6f |....cessfully.Fo|
75 6e 64 20 50 72 6f 67 72 61 6d 6d 65 72 20 66 |und Programmer f|
6c 61 73 68 20 63 68 69 70 20 22 4f 70 61 71 75 |lash chip "Opaqu|
65 20 66 6c 61 73 68 20 63 68 69 70 22 20 28 38 |e flash chip" (8|
31 39 32 20 6b 42 2c 20 50 72 6f 67 72 61 6d 6d |192 kB, Programm|
65 72 2d 73 70 65 63 69 66 69 63 29 20 6d 61 70 |er-specific) map|
70 65 64 20 61 74 20 70 68 79 73 69 63 61 6c 20 |ped at physical |
61 64 64 72 65 73 73 20 30 78 30 30 30 30 30 30 |address 0x000000|
30 30 2e 0a ff ff ff ff ff ff ff ff ff ff ff ff |00..............|
ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
...
While for most applications, closing stdout or stderr would just lead
to obsure bugs, for flashrom, we should have extra safety guards, as
this could mean that we might be bricking a device instead.
Add a basic safety check.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I751c9dd88ad1d30283b94bd2185b4f8f25569c8f
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52215
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Shutdown function was covering two different jobs here:
1) the actual shutdown which is run at the end of the driver's
lifecycle and 2) cleanup in cases when initialisation failed.
Now, shutdown is only doing its main job (#1), and the driver
itself is doing cleanup when init fails (#2).
The good thing is that now resources are released/closed immediately
in cases when init fails (vs shutdown function which was run at some
point later), and the driver leaves clean space after itself
if init fails.
And very importantly this unlocks API change which plans to move
register_shutdown inside register master API, see this
https://review.coreboot.org/c/flashrom/+/51761
TEST=builds
BUG=b:185191942
Change-Id: I71f64ed38154af670d4d28b8c7914d87fbc75679
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52308
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Move global singleton states into a struct and store within
the spi_master data field for the life-time of the driver.
This is one of the steps on the way to move spi_master data
memory management behind the initialisation API, for more
context see other patches under the same topic "register_master_api".
TEST=builds
BUG=b:140394053
Change-Id: I67518a58b4f35e0edaf06ac09c9374bdf06db0df
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Change-Id: I04a0fdf9b5126b9f4006e8229c3926ceb1013456
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51979
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I3897b8d980425ecbb89b238d4a766f628cf9d3e6
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51978
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This change removes the build dependency on libpci for config_rayer_spi
it also makes sure that dependency on raw_access is maintained.
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: If7206a69d031c9bba9475a9e6769f6ef35701379
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The Raiden debug external spi programmer need only depend
on libusb and is unrelated to libpci. Correct meson and gnu make
builds where meson had configuration in the incorrect section
and gnu make artifactually disabled the build on Windows/MinGW
which doesn't have libpci.
BUG=none
TEST=still continues to build.
Change-Id: I2d6a8c33a2228abf006a9b278bcb7133765c7074
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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This commit enables the feature and makes changes to existing
files and tests. I am writing more new tests with this.
Commit includes tests/flashrom.c because after enabling memory
checks the test started to fail (it used to leak memory indeed).
If you are wondering how to verify it works (because at the moment
all tests [still] pass so it’s not obvious that anything has
changed), then for example:
1) Remove free’s in flashbuses_to_text_test_success test, and it
will fail with message similar to this (line numbers from your local
source)
[ ERROR ] --- Blocks allocated...
../flashrom.c:1239: note: block 0x55f42304b640 allocated here
../flashrom.c:1239: note: block 0x55f42304b5c0 allocated here
../flashrom.c:1239: note: block 0x55f42304b3d0 allocated here
../flashrom.c:1239: note: block 0x55f42304b700 allocated here
../flashrom.c:1239: note: block 0x55f42304b780 allocated here
../flashrom.c:1239: note: block 0x55f42304bb00 allocated here
../flashrom.c:1239: note: block 0x55f42304b810 allocated here
ERROR: flashbuses_to_text_test_success leaked 7 block(s)
2) Add char *temp = malloc just before return from strcat_realloc
[ ERROR ] --- Blocks allocated...
../helpers.c:88: note: block 0x55a51307b6c0 allocated here
../helpers.c:88: note: block 0x55a51307b9e0 allocated here
ERROR: strcat_realloc_test_success leaked 2 block(s)
BUG=b:181803212
TEST=builds and ninja test
nm builddir/tests/flashrom_unit_tests.p/.._flashrom.c.o
nm builddir/tests/flashrom_unit_tests.p/flashrom.c.o
nm builddir/flashrom.p/flashrom.c.o
Change-Id: I0c6b6b8dc17aaee28640e3fca3d1fc9f7feabf5f
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Reorder functions to avoid forward-declarations of structs. Similar
thing was done earlier for functions declarations, this patch takes
care of structs declarations.
BUG=b:140394053
TEST=builds
objdump -d is identical
objdump -s only difference is version number
Change-Id: I256bd7c763efc010fc1f29f7c5853f150ac10739
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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The chip was marked as TESTED_OK_PREW in the cros tree by
`commit 419e32ae457cc36b03757b89471a7ce3770e9611`.
Quoting from the original commit message:
> TEST=Tested writes using Servo
Change-Id: Id7f44a41d6b2c397f1ce2e345f8ab44e95e4cfa2
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51736
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Tested read/write/erase/verify with FT232H programmer.
Change-Id: Ia7d52b69eb571113fe3c60ec9a139ee67180509b
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51735
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The chip was marked as TESTED_OK_PREW in the cros tree by
`commit b2f900273aac329b82089e4dbc5a8ba3d032fff0`.
Quoting from the original commit message:
> TEST=read and write BIOS on glimmer with Eon device.
Change-Id: I13dc3e6bde9e4581fdd5856a412918784b913fbc
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51734
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I68d3055d0d6b80b79673f66769663387fe15dcde
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Allow the user to specify if they would like a static archive or a DSO
produced for libflashrom by way of the flag e.g. `-Ddefault_library=static`.
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I77e5c298163979a0222270b3ac5d03542e5618f7
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51616
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Align meson options to be equivalent to the Makefile as they are used in
Gentoo's ebuilds.
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I97d2fd687aa21533b86f9af446038bfe3da1f7d3
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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This is matching the following comment on Makefile:
\# This is a dirty hack, but it saves us from checking all PCI drivers and all platforms manually.
\# libpci may need raw memory, MSR or PCI port I/O on some platforms.
\# Individual drivers might have the same needs as well.
This changes fixes:
ld.lld: error: undefined symbol: rget_io_perms
>>> referenced by internal.c:243 (../flashrom-9999/internal.c:243)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_init)
ld.lld: error: undefined symbol: mmio_writeb
>>> referenced by internal.c:122 (../flashrom-9999/internal.c:122)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writeb)
ld.lld: error: undefined symbol: mmio_writew
>>> referenced by internal.c:128 (../flashrom-9999/internal.c:128)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writew)
ld.lld: error: undefined symbol: mmio_writel
>>> referenced by internal.c:134 (../flashrom-9999/internal.c:134)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_writel)
ld.lld: error: undefined symbol: mmio_readb
>>> referenced by internal.c:140 (../flashrom-9999/internal.c:140)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readb)
ld.lld: error: undefined symbol: mmio_readw
>>> referenced by internal.c:146 (../flashrom-9999/internal.c:146)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readw)
ld.lld: error: undefined symbol: mmio_readl
>>> referenced by internal.c:152 (../flashrom-9999/internal.c:152)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readl)
ld.lld: error: undefined symbol: mmio_readn
>>> referenced by internal.c:158 (../flashrom-9999/internal.c:158)
>>> libflashrom.so.1.0.0.p/internal.c.o:(internal_chip_readn)
ld.lld: error: undefined symbol: physmap
>>> referenced by flashrom.c:1454 (../flashrom-9999/flashrom.c:1454)
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(probe_flash)
>>> referenced by flashrom.c:1454 (../flashrom-9999/flashrom.c:1454)
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(probe_flash)
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
>>> referenced 2 more times
ld.lld: error: undefined symbol: physunmap
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
>>> referenced by flashrom.c
>>> libflashrom.so.1.0.0.p/flashrom.c.o:(programmer_table)
Change-Id: Id3fa4ec7a735b81e989ba9fe2b53b18d0956627a
Signed-off-by: Daniel Campello <campello@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51577
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Richard Hughes <hughsient@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Reorder functions to avoid forward-declarations.
This was aimed to be done for all spi masters in the earlier patch
however this file was missed.
BUG=b:140394053
TEST=builds
Change-Id: I0e3c82967a169d6a2512ffa17d1e0c78eafb2797
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51555
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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It needs more disk space and RAM. Also, make it the default as
NetBSD 7.1 packages are gone.
Change-Id: Ic823cd30228f15859462844eb50d213487f74873
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51481
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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NetBSD 7.1 mirrors have dropped its packages, so we need something
new and more flexibility. As we have always used NetBSD 7.1 so far,
prepend the tags with `7.1-`.
To avoid re-building old images, one can re-tag them, e.g.:
$ docker image tag mani/anita:amd64 mani/anita:7.1-amd64
Change-Id: I44351805abab93c666d1d12c2bb17380caa75cec
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I95e428a19b4c2042430d3147845397adb1c37e9b
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I243aa11f4a017a4209efcc227cec56eb12020e28
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33340
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I6c9939601abd3bd67424b8fa9a5ec800e50e3a51
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33342
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Their old compilers stumble because of `-Wmissing-braces`.
Change-Id: Ia9ee17fd1f0c8b191091f89ffbf44329c6521d7d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33339
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I2f7aebe602ebdb0a4748640e281b9a92146f0ca8
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33338
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I4651b55744d730956aa8fda8fdfccbbd68cdda19
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33337
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Also add two new make targets `1.0.x` and `show-1.0.x`.
Change-Id: I2bc2e79729016a8f9908f316b051deeb73dc096f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/30418
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add a set of Dockerfiles for build testing. If you have an x86 machine
and ~20GiB free disk space, run `make register` and `make -jxx` in
util/manibuilder and go eat some pizza. The former runs a privileged
docker container to set binfmt_misc up for qemu (read the code, don't
trust it).
Regarding the build targets, this is the original state of Manibuilder
as it was used to build-test `flashrom-1.0`. Some fixes to the frame-
work were applied, but fixups for the targets will be done in separate
patches to maintain their original state for reference.
Change-Id: I60863a5c7d70dde71486fccb66cb59b30ba4d982
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/23005
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Fixes building on 32-bit x86 systems.
Change-Id: I8d798804f8055cdaff45f123e4f0d6ab4b71ba60
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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TEST=`flashrom -r` on a kindred chromebook with a Celeron 5205U.
Change-Id: I627dcacdad167343287ac0ec26b47505c2f823ee
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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update .tested field from TEST_UNTESTED to TEST_OK_PREW
BUG=b:159768722
BRANCH=none
TEST=Flash Duffy bios
pass on running `flashrom_tester /usr/sbin/flashrom host`
Original-Change-Id: I9467588988c2cab0987737c53ace0832144ef169
Original-Signed-off-by: Tim Chen <tim-chen@quanta.corp-partner.google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2281508
Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Original-Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
(cherry picked from commit 045e05eb92e3dd826e8ce61973c0d1004195a3ff)
Change-Id: Ic111f1a9cc5c7b5b5100ddda362c11c91e8a4165
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Drop unnecessary spaces and indent with tabs, as per the coding style.
TEST=Build with `make distclean && make VERSION=none -j` with and
without this patch, the flashrom executable does not change.
Change-Id: I200ace750dbe3c8d99f792d70a85b2ebd4e5b0ce
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Guard macro parameters and correct a typo in the parameter name.
TEST=Build with `make distclean && make VERSION=none -j` with and
without this patch, the flashrom executable does not change.
Change-Id: Ifc917b001713bc96adee46019d267f2090ef184a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Tested reading and writing internal flash on HP Z220 SFF.
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Change-Id: I97538577c32e6c40374c414f005eb3165ed2e11d
Reviewed-on: https://review.coreboot.org/c/flashrom/+/50986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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The following adds support for the Adesto AT25SF128A-SHB-T part.
We have varied the correct chip name is reported as well as write
and read 16MBytes of random data and verified the checksum's match.
Further, --wp-list appears to report the correct ranges.
BUG=None
BRANCH=none
TEST=Ran flashrom with a Dediprog SF100, RW random data and checksum
matched.
Original-Change-Id: Ic22ca588f33753fdf492e8445324bcc0a809d3e2
Original-Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/1593201
Original-Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Original-Tested-by: Martin Roth <martinroth@chromium.org>
Original-Reviewed-by: Martin Roth <martinroth@chromium.org>
(cherry picked from commit 1fa87e058b72a2de1e9127a45e9978361de48479)
Note: this does not include the changes made to writeprotect.c in the
original patch, as they depend on a large amount of additional
writeprotect code that is currently only present in the cros tree, and
the intention here is just to reduce the diff in flashchips.c.
The `.wp` field has also been removed.
Change-Id: I1ce2a6699a1f0116306f668123673a1ba9c932d2
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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