diff options
Diffstat (limited to 'smh-ac415-fpga/lcd_driver/a_input.vhdl')
| -rw-r--r-- | smh-ac415-fpga/lcd_driver/a_input.vhdl | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/smh-ac415-fpga/lcd_driver/a_input.vhdl b/smh-ac415-fpga/lcd_driver/a_input.vhdl index 15f1990..434d820 100644 --- a/smh-ac415-fpga/lcd_driver/a_input.vhdl +++ b/smh-ac415-fpga/lcd_driver/a_input.vhdl @@ -15,7 +15,7 @@ ENTITY a_input IS PORT ( - clk_50m : in std_logic; + p_clk : in std_logic; sys_rst_n : in std_logic; video_in:in std_logic; bright_in:in std_logic; @@ -32,14 +32,15 @@ END a_input; ARCHITECTURE beh OF a_input IS - signal p_clk : std_logic; signal p_clk_div : natural; + signal row_addr : std_logic_vector(17 downto 0) ; signal addr : std_logic_vector(17 downto 0) ; signal wren: std_logic; signal s_hsync: std_logic; signal d_hsync: std_logic; + signal pe_hsync: std_logic; signal ne_hsync: std_logic; @@ -55,13 +56,6 @@ ARCHITECTURE beh OF a_input IS begin - - a_clk0: work.a_clk_gen - port map ( - areset => not sys_rst_n, - inclk0 => clk_50m, - c0 => p_clk - ); video_sync: entity work.synchronizer @@ -113,6 +107,7 @@ begin port map( clk => p_clk, sig => d_hsync, + pe => pe_hsync, ne => ne_hsync); @@ -131,21 +126,25 @@ begin process (sys_rst_n,p_clk,d_hsync,d_vsync) begin if sys_rst_n = '0' then + row_addr<=(others =>'0'); addr<=(others =>'0'); p_clk_div<=p_clk_multiple; active_counter <=0; fp_counter <=0; elsif rising_edge(p_clk) then if d_vsync='1' then + row_addr<=(others => '0'); addr<=(others => '0'); fp_counter <= front_porch; active_counter <=hres; p_clk_div <=p_clk_multiple; + elsif pe_gsync ='1' then + row_addr <= std_logic_vector(unsigned(row_addr)+1); elsif ne_hsync='1' then fp_counter <= front_porch; active_counter <=hres; p_clk_div <=p_clk_multiple; - addr <= std_logic_vector(unsigned(addr)+1); + addr<=row_addr; elsif fp_counter /= 0 then fp_counter <= fp_counter -1; elsif active_counter /= 0 then @@ -156,6 +155,8 @@ begin else p_clk_div <= p_clk_div - 1; end if; + else + p_clk_div <=p_clk_multiple; end if; end if; end process; |