tidy

9 files changed, 16 insertions, 371 deletions

diff --git a/fpga/hp_lcd_driver/Makefile b/fpga/hp_lcd_driver/Makefile
index 693085b..f252002 100644
--- a/fpga/hp_lcd_driver/Makefile
+++ b/fpga/hp_lcd_driver/Makefile
@@ -1,9 +1,9 @@
-TARGETS= ep4ce15 spartan6 #ep4ce6
-fish:ep4ce15
+TARGETS= smh-ac415 spartan6 #ep4ce6
+fish:smh-ac415
+
 default: ${TARGETS:%=build_%/hp_lcd_driver.svf}
 
-ep4ce15: build_ep4ce15/hp_lcd_driver.svf
-ep4ce6hp: build_ep4ce6/hp_lcd_driver.svf
+smh-ac415: build_smh-ac415/hp_lcd_driver.svf
 spartan6: build_spartan6/hp_lcd_driver.svf
 
 build_%/hp_lcd_driver.svf: dummy
diff --git a/fpga/hp_lcd_driver/ep4ce15.cfg b/fpga/hp_lcd_driver/ep4ce15.cfg
index 39925e2..4c94f89 100644
--- a/fpga/hp_lcd_driver/ep4ce15.cfg
+++ b/fpga/hp_lcd_driver/ep4ce15.cfg
@@ -6,5 +6,5 @@ jtag newtap $CHIPNAME tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id $FP
 
 init
 scan_chain
-svf -tap $CHIPNAME.tap ./build_ep4ce15/hp_lcd_driver.svf
-exit
+#svf -tap $CHIPNAME.tap ./build_ep4ce15/hp_lcd_driver.svf
+#exit
diff --git a/fpga/hp_lcd_driver/ep4ce6.mk b/fpga/hp_lcd_driver/ep4ce6.mk
deleted file mode 100644
index f758f9c..0000000
--- a/fpga/hp_lcd_driver/ep4ce6.mk
+++ /dev/null
@@ -1,126 +0,0 @@
-include relpath.mk
-
-FAMILY=Cyclone IV E
-PART=EP4CE6E22C8
-TOP=hp_lcd_driver
-BUILD=build_ep4ce6
-OF=output_files
-
-PROJECT = hp_lcd_driver
-VSRCS =synchronizer.vhdl debounce.vhdl edge_det.vhdl input_formatter.vhdl input_stage.vhdl output_formatter.vhdl output_analog.vhdl tmds_encoder.vhdl tmds_encode.vhdl tmds_phy_cyclone4.vhdl tmds_output_cyclone4.vhdl  output_stage.vhdl clkgen_cyclone4.vhdl vram_cyclone4.vhdl hp_lcd_driver.vhdl
-IPS= vram_cyclone4_impl.vhdl  clkgen_cyclone4_impl.vhdl
-
-DESIGN_NAME=${TOP}
-
-MAP_ARGS = --smart 
-FIT_ARGS =
-ASM_ARGS =
-STA_ARGS =
-CPF_ARGS = -c -q 1MHZ -g 3.3 -n p
-
-GEN_VSRCS=${IPS:%.vhdl=${BUILD}/%.vhd}
-QIP=${GEN_VSRCS:%.vhd=%.qip}
-
-BASE=${BUILD}/${DESIGN_NAME}
-QSF=${BASE}.qsf
-QPF=${BASE}.qpf
-MAP=${BUILD}/${OF}/$(PROJECT).map.rpt
-FIT=${BUILD}/${OF}/$(PROJECT).fit.rpt
-ASM=${BUILD}/${OF}/$(PROJECT).asm.rpt
-ASM=${BUILD}/${OF}/$(PROJECT).sta.rpt
-SOF=${BUILD}/${OF}/${PROJECT}.sof
-SVF=${BUILD}/${PROJECT}.svf
-
-default:${SVF}
-
-
-${BUILD}/%.vhd ${BUILD}/%.qip:%.vhdl
-	cat $< > ${BUILD}/${<:%.vhdl=%.vhd}
-	(cd ${BUILD} && run_quartus qmegawiz -silent $(call relpath,${BUILD}/${<:%.vhdl=%.vhd},${BUILD}))
-
-
-${QSF}: ${PRJ} ${DESIGN_NAME}.ep4ce6_qsft
-	mkdir -p ${BUILD}
-	rm -f  $@
-	echo 'set_global_assignment -name TOP_LEVEL_ENTITY ${TOP}' >> $@
-	echo 'set_global_assignment -name FAMILY "${FAMILY}"' >> $@
-	echo 'set_global_assignment -name PROJECT_OUTPUT_DIRECTORY ${OF}' >> $@
-	echo 'set_global_assignment -name DEVICE ${PART}' >> $@
-	cat  ${DESIGN_NAME}.ep4ce6_qsft >> $@
-	for file in ${GEN_VSRCS} ${VSRCS}; do \
-	echo "set_global_assignment -name VHDL_FILE $$(realpath -m --relative-to=${BUILD} $${file})" >> $@; \
-	done
-
-
-
-${QPF}:
-	mkdir -p ${BUILD}
-	rm -f $@
-	echo 'PROJECT_REVISION = "${TOP}"' > $@
-
-
-map: ${MAP}
-${MAP}: ${VSRCS} ${QPF} ${QSF} ${GEN_VSRCS}  ${QIP}
-	(cd ${BUILD} && run_quartus quartus_map $(MAP_ARGS) ${PROJECT}) 
-
-fit: ${FIT}
-${FIT}:${MAP}
-	(cd ${BUILD} && run_quartus quartus_fit $(FIT_ARGS) $(PROJECT))
-
-asm: ${ASM}
-sof: ${ASM}
-${SOF} ${ASM}:${FIT}
-	(cd ${BUILD} && run_quartus quartus_asm $(ASM_ARGS) $(PROJECT))
-
-sta: ${STA}
-${STA}:${FIT}
-	(cd ${BUILD} && run_quartus quartus_sta $(STA_ARGS) $(PROJECT))
-
-
-svf:${SVF}
-${SVF}:${SOF}
-	(cd ${BUILD} && run_quartus quartus_cpf ${CPF_ARGS} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) )
-
-
-
-tidy:
-	git diff --exit-code -s ${VSRCS}	
-	for i in ${VSRCS}; do /bin/cp -f $$i $$i.orig && scripts/vhdl-pretty < $$i.orig > $$i; done
-
-
-
-#
-#
-##OPENOCD=openocd -f interface/altera-usb-blaster.cfg -f cpld/altera-epm240.cfg
-#
-#FIT_ARGS = 
-#ASM_ARGS =
-#
-#SVF=${PROJECT}.svf
-#
-#
-#
-#default: ${SVF}
-#
-#${SVF}: ${BUILD}/${PROJECT}.svf
-#	cat $< > $@ || /bin/rm -f $@
-#
-#program: ${SVF}
-#	${OPENOCD} -c "init; svf $<; exit"
-#
-#all: ${BUILD}/$(PROJECT).asm.rpt ${BUILD}/$(PROJECT).sta.rpt  ${BUILD}/${PROJECT}.svf
-#
-clean:
-	rm -rf db ${BUILD} *.orig *.bak incremental_db db
-
-#
-#
-#
-#
-#
-#
-
-#tidy:
-#	for i in ${SOURCE_FILES}; do /bin/cp -f $$i $$i.orig && scripts/vhdl-pretty < $$i.orig > $$i; done
-#
-#
diff --git a/fpga/hp_lcd_driver/hp_lcd_driver.ep4ce15_qsft b/fpga/hp_lcd_driver/hp_lcd_driver.ep4ce15_qsft
deleted file mode 100644
index e22c246..0000000
--- a/fpga/hp_lcd_driver/hp_lcd_driver.ep4ce15_qsft
+++ /dev/null
@@ -1,87 +0,0 @@
-#set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
-#set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:47:00  APRIL 20, 2025"
-#set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
-
-set_parameter -name target "cyclone4"
-
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
-set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
-set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
-set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
-set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
-set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
-set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS"
-
-set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF
-
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
-
-set_location_assignment PIN_T22 -to clk_50m
-set_location_assignment PIN_U20 -to sys_rst_n
-
-set_location_assignment PIN_AB17 -to vsync_out
-set_location_assignment PIN_AA18 -to hsync_out
-
-set_location_assignment PIN_J21 -to r_out
-set_instance_assignment -name IO_STANDARD "2.5 V" -to r_out
-#set_location_assignment PIN_K21 -to rgb[14]
-#set_location_assignment PIN_L22 -to rgb[13]
-#set_location_assignment PIN_L21 -to rgb[12]
-#set_location_assignment PIN_M22 -to rgb[11]
-set_location_assignment PIN_M21 -to g_out
-#set_location_assignment PIN_N21 -to rgb[9]
-#set_location_assignment PIN_N20 -to rgb[8]
-#set_location_assignment PIN_U22 -to rgb[7]
-#set_location_assignment PIN_U21 -to rgb[6]
-#set_location_assignment PIN_W20 -to rgb[5]
-set_location_assignment PIN_W19 -to b_out
-#set_location_assignment PIN_Y21 -to rgb[3]
-#set_location_assignment PIN_AB19 -to rgb[2]
-#set_location_assignment PIN_AA19 -to rgb[1]
-#set_location_assignment PIN_AB18 -to rgb[0]
-
-
-
-set_location_assignment PIN_H21 -to hdmi_c_p
-set_location_assignment PIN_H22 -to hdmi_c_n
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_c_p
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_c_n
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_c_p
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_c_n
-
-set_location_assignment PIN_F21 -to hdmi_b_p
-set_location_assignment PIN_F22 -to hdmi_b_n
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_b_p
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_b_n
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_b_p
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_b_n
-
-set_location_assignment PIN_E21 -to hdmi_g_p
-set_location_assignment PIN_E22 -to hdmi_g_n
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_g_p
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_g_n
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_g_p
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_g_n
-
-set_location_assignment PIN_D21 -to hdmi_r_p
-set_location_assignment PIN_D22 -to hdmi_r_n
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_r_p
-set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_r_n
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_r_p
-set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to hdmi_r_n
-
-
-set_location_assignment PIN_AA14 -to hsync_in
-set_location_assignment PIN_W14 -to vsync_in
-set_location_assignment PIN_AA15 -to video[0]
-set_location_assignment PIN_V15 -to video[1]
-set_location_assignment PIN_W7 -to i_clk_out
-
-
-
-
diff --git a/fpga/hp_lcd_driver/hp_lcd_driver.ep4ce6_qsft b/fpga/hp_lcd_driver/hp_lcd_driver.ep4ce6_qsft
deleted file mode 100644
index e3bc6c5..0000000
--- a/fpga/hp_lcd_driver/hp_lcd_driver.ep4ce6_qsft
+++ /dev/null
@@ -1,144 +0,0 @@
-#set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
-#set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:47:00  APRIL 20, 2025"
-#set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
-
-set_parameter -name target "cyclone4"
-
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
-set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
-set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
-set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
-set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
-set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
-set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS"
-
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
-
-
-# use the beeper for this!
-set_location_assignment PIN_85  -to sys_rst_n
-
-#key 3
-set_location_assignment PIN_89  -to video(0)
-#key 4
-set_location_assignment PIN_90  -to video(1)
-
-set_location_assignment PIN_98  -to hsync_in
-set_location_assignment PIN_99  -to vsync_in
-
-#lies - it's 48
-set_location_assignment PIN_24  -to clk_50m
-
-set_location_assignment PIN_100 -to hsync_out
-#set_location_assignment PIN_101 -to vsync_out
-
-set_location_assignment PIN_126 -to r_out
-set_location_assignment PIN_110 -to b_out
-set_location_assignment PIN_119 -to g_out
-
-set_location_assignment PIN_133	-to hdmi_c_p
-set_location_assignment PIN_135 -to hdmi_c_n
-set_location_assignment PIN_136 -to hdmi_r_p
-set_location_assignment PIN_137 -to hdmi_r_n
-set_location_assignment PIN_138 -to hdmi_g_p
-set_location_assignment PIN_142 -to hdmi_g_n
-set_location_assignment PIN_143 -to hdmi_b_p
-set_location_assignment PIN_144 -to hdmi_b_n
-
-
-
-# bank 1
-#
-#set_location_assignment PIN_141 -to led_5
-#set_location_assignment PIN_1   -to led_4
-#set_location_assignment PIN_2   -to led_3
-#set_location_assignment PIN_3   -to led_2
-#
-#set_location_assignment PIN_7   -to flash_di
-#set_location_assignment PIN_10  -to flash_clk
-#set_location_assignment PIN_11  -to flash_ncs
-#set_location_assignment PIN_23  -to flash_do
-#set_location_assignment PIN_25  -to tmp1
-##
-##bank 2
-#set_location_assignment PIN_28  -to dram_dq[1]
-#set_location_assignment PIN_30  -to dram_dq[0]
-#set_location_assignment PIN_31  -to dram_dq[3]
-#set_location_assignment PIN_32  -to dram_dq[2]
-#set_location_assignment PIN_33  -to dram_dq[4]
-#set_location_assignment PIN_34  -to dram_dq[5]
-#
-##bank 3
-#set_location_assignment PIN_38  -to dram_dq[6]
-#set_location_assignment PIN_39  -to dram_dq[7]
-#set_location_assignment PIN_42  -to dram_ldqm
-#set_location_assignment PIN_43  -to dram_we_n
-#set_location_assignment PIN_44  -to dram_cas_n
-#set_location_assignment PIN_46  -to dram_ras_n
-#set_location_assignment PIN_49  -to dram_dq[15]
-#set_location_assignment PIN_50  -to dram_dq[14]
-#set_location_assignment PIN_51  -to dram_dq[13]
-#set_location_assignment PIN_52  -to dram_dq[12]
-#set_location_assignment PIN_53  -to dram_dq[11]
-#
-##bank 4
-#set_location_assignment PIN_54  -to dram_dq[10]
-#set_location_assignment PIN_55  -to dram_dq[9]
-#set_location_assignment PIN_58  -to dram_dq[8]
-#set_location_assignment PIN_59  -to dram_udqm
-#set_location_assignment PIN_60  -to dram_clk
-#set_location_assignment PIN_64  -to dram_cke
-#set_location_assignment PIN_65  -to dram_addr[12]
-#set_location_assignment PIN_66  -to dram_addr[11]
-#set_location_assignment PIN_67  -to dram_addr[9]
-#set_location_assignment PIN_68  -to dram_addr[8]
-#set_location_assignment PIN_69  -to dram_addr[7]
-#set_location_assignment PIN_70  -to dram_addr[6]
-#set_location_assignment PIN_71  -to dram_addr[5]
-#set_location_assignment PIN_72  -to dram_addr[4]
-#
-## bank 5
-#set_location_assignment PIN_73  -to dram_ba_0
-#set_location_assignment PIN_74  -to dram_cs_n
-#set_location_assignment PIN_75  -to dram_ba_1
-#set_location_assignment PIN_76  -to dram_addr[10]
-#set_location_assignment PIN_77  -to dram_addr[0]
-#set_location_assignment PIN_80  -to dram_addr[1]
-#set_location_assignment PIN_83  -to dram_addr[2]
-#set_location_assignment PIN_84  -to dram_addr[3]
-#set_location_assignment PIN_86  -to uart_txd
-#set_location_assignment PIN_87  -to uart_rxd
-##
-## clocks 2
-#set_location_assignment PIN_88  -to key_2
-#set_location_assignment PIN_89  -to key_3
-#set_location_assignment PIN_90  -to key_4
-#set_location_assignment PIN_91  -to key_1
-#
-## bank 6
-#set_location_assignment PIN_103 -to vga_b[0]
-#set_location_assignment PIN_104 -to vga_b[1]
-#set_location_assignment PIN_105 -to vga_b[2]
-#set_location_assignment PIN_106 -to vga_b[3]
-##
-##bank 7
-#set_location_assignment PIN_111 -to vga_g[0]
-#set_location_assignment PIN_112 -to vga_g[1]
-#set_location_assignment PIN_113 -to vga_g[2]
-#set_location_assignment PIN_114 -to vga_g[3]
-#set_location_assignment PIN_115 -to vga_g[4]
-#set_location_assignment PIN_120 -to vga_r[0]
-#set_location_assignment PIN_121 -to vga_r[1]
-#set_location_assignment PIN_121 -to vga_r[2]
-#set_location_assignment PIN_125 -to vga_r[3]
-#set_location_assignment PIN_127 -to adc_clk
-#
-##bank 8
-#set_location_assignment PIN_128 -to adc_dat
-#set_location_assignment PIN_129 -to adc_ncs
-#set_location_assignment PIN_132 -to ir
diff --git a/fpga/hp_lcd_driver/output_formatter.vhdl b/fpga/hp_lcd_driver/output_formatter.vhdl
index 96964ed..aafce2c 100644
--- a/fpga/hp_lcd_driver/output_formatter.vhdl
+++ b/fpga/hp_lcd_driver/output_formatter.vhdl
@@ -71,7 +71,7 @@ begin
                 if v /= (v_total-1) then
                     v <= v+1;
                     h <= 0;
-                else --if vsync_in_ne = '1' then
+                else                    --if vsync_in_ne = '1' then
                     h <= 0;
                     v <= 0;
                 end if;
diff --git a/fpga/hp_lcd_driver/output_stage.vhdl b/fpga/hp_lcd_driver/output_stage.vhdl
index 831e9f8..08dcfdd 100644
--- a/fpga/hp_lcd_driver/output_stage.vhdl
+++ b/fpga/hp_lcd_driver/output_stage.vhdl
@@ -129,9 +129,9 @@ begin
     addr_out <= addr;
 
 
-    r <=r_in;
-    g <=g_in;
-    b <=b_in;
+    r <= r_in;
+    g <= g_in;
+    b <= b_in;
 
 
 --    r<=x"00" when h_grid='0'
diff --git a/fpga/hp_lcd_driver/prog b/fpga/hp_lcd_driver/prog
index c0e433c..eab1443 100755
--- a/fpga/hp_lcd_driver/prog
+++ b/fpga/hp_lcd_driver/prog
@@ -2,5 +2,6 @@
 
 
 OPENOCD="/root/projects/hp_instrument_lcds/fpga/prefix/bin/openocd -f interface/altera-usb-blaster.cfg -f ep4ce15.cfg"
-${OPENOCD} -c quit
+${OPENOCD} -c 'svf -tap $CHIPNAME.tap ./build_smh-ac415/hp_lcd_driver.svf; shutdown ; quit'
+
 
diff --git a/fpga/hp_lcd_driver/ep4ce15.mk b/fpga/hp_lcd_driver/smh-ac415.mk
index 982934b..52e23e7 100644
--- a/fpga/hp_lcd_driver/ep4ce15.mk
+++ b/fpga/hp_lcd_driver/smh-ac415.mk
@@ -1,9 +1,10 @@
 include relpath.mk
 
+BOARD=smh-ac415
 FAMILY=Cyclone IV E
 PART=EP4CE15F23C8
 TOP=hp_lcd_driver
-BUILD=build_ep4ce15
+BUILD=build_${BOARD}
 OF=output_files
 
 PROJECT = hp_lcd_driver
@@ -39,14 +40,14 @@ ${BUILD}/%.vhd ${BUILD}/%.qip:%.vhdl
 	(cd ${BUILD} && run_quartus qmegawiz -silent $(call relpath,${BUILD}/${<:%.vhdl=%.vhd},${BUILD}))
 
 
-${QSF}: ${PRJ} ${DESIGN_NAME}.ep4ce15_qsft
+${QSF}: ${PRJ} ${DESIGN_NAME}.${BOARD}_qsft
 	mkdir -p ${BUILD}
 	rm -f  $@
 	echo 'set_global_assignment -name TOP_LEVEL_ENTITY ${TOP}' >> $@
 	echo 'set_global_assignment -name FAMILY "${FAMILY}"' >> $@
 	echo 'set_global_assignment -name PROJECT_OUTPUT_DIRECTORY ${OF}' >> $@
 	echo 'set_global_assignment -name DEVICE ${PART}' >> $@
-	cat  ${DESIGN_NAME}.ep4ce15_qsft >> $@
+	cat  ${DESIGN_NAME}.${BOARD}_qsft >> $@
 	for file in ${GEN_VSRCS} ${VSRCS}; do \
 	echo "set_global_assignment -name VHDL_FILE $$(realpath -m --relative-to=${BUILD} $${file})" >> $@; \
 	done