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-rw-r--r--os/hal/platforms/STM32/i2c_lld.c21
-rw-r--r--os/hal/platforms/STM32/i2c_lld.h21
2 files changed, 31 insertions, 11 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index 65cdec1b3..68e42972c 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -112,12 +112,25 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
if ((i2cp->id_state == I2C_READY) && (i2cp->id_i2c->SR1 & I2C_SR1_SB)){// start bit sent
i2cp->id_state = I2C_MACTIVE;
- //TODO: 10 bit address handling
- i2cp->id_i2c->DR = (i2cp->id_slave_config->addr7 << 1) |
+ /*TODO: 10 bit address handling
+ In 10-bit addressing mode,
+ – To enter Transmitter mode, a master sends the header (11110xx0) and then the
+ slave address, (where xx denotes the two most significant bits of the address).
+ – To enter Receiver mode, a master sends the header (11110xx0) and then the
+ slave address. Then it should send a repeated Start condition followed by the
+ header (11110xx1), (where xx denotes the two most significant bits of the
+ address).
+ The TRA bit indicates whether the master is in Receiver or Transmitter mode.*/
+
+ i2cp->id_i2c->DR = (i2cp->id_slave_config->address << 1) |
i2cp->id_slave_config->rw_bit; // write slave address in DR
return;
}
+ if ((i2cp->id_state == I2C_MACTIVE) && (i2cp->id_i2c->SR1 & I2C_SR1_ADD10)){// header sent
+
+ }
+
// "wait" interrupt with ADDR flag
if ((i2cp->id_state == I2C_MACTIVE) && (i2cp->id_i2c->SR1 & I2C_SR1_ADDR)){// address successfully sent
if(i2cp->id_i2c->SR2 & I2C_SR2_TRA){
@@ -468,7 +481,7 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t re
i2cp->id_i2c->CR1 |= I2C_CR1_START; // generate start condition
while (!(i2cp->id_i2c->SR1 & I2C_SR1_SB)); // wait Address sent
- i2cp->id_i2c->DR = (i2cp->id_slave_config->addr7 << 1) | I2C_WRITE; // write slave addres in DR
+ i2cp->id_i2c->DR = (i2cp->id_slave_config->address << 1) | I2C_WRITE; // write slave addres in DR
while (!(i2cp->id_i2c->SR1 & I2C_SR1_ADDR)); // wait Address sent
i = i2cp->id_i2c->SR2;
i = i2cp->id_i2c->SR1; //i2cp->id_i2c->SR1 &= (~I2C_SR1_ADDR); // clear ADDR bit
@@ -505,7 +518,7 @@ void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
uint16_t i = 0;
// send slave addres with read-bit
- i2cp->id_i2c->DR = (i2cp->id_slave_config->addr7 << 1) | I2C_READ;
+ i2cp->id_i2c->DR = (i2cp->id_slave_config->address << 1) | I2C_READ;
while (!(i2cp->id_i2c->SR1 & I2C_SR1_ADDR)); // wait Address sent
i = i2cp->id_i2c->SR2;
diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h
index 25e451962..5f7098d50 100644
--- a/os/hal/platforms/STM32/i2c_lld.h
+++ b/os/hal/platforms/STM32/i2c_lld.h
@@ -138,19 +138,19 @@ struct I2CSlaveConfig{
* @brief Callback pointer.
* @note Transfer finished callback. Invoke when all data transferred, or
* by DMA buffer events
- * @p NULL then the callback is disabled.
+ * If set to @p NULL then the callback is disabled.
*/
i2ccallback_t id_callback;
/**
* @brief Callback pointer.
- * @note TODO: I don't know, when this callback is inwoked
- * @p NULL then the callback is disabled.
+ * @note This callback will be invoked when error condition occur.
+ * If set to @p NULL then the callback is disabled.
*/
i2cerrorcallback_t id_err_callback;
i2cblock_t *rxbuf; // pointer to buffer
size_t rxdepth; // depth of buffer
- size_t rxbytes; // count of bytes to sent in one sending
+ size_t rxbytes; // count of bytes to sent in one transmission
size_t rxbufhead; // head pointer to current data byte
i2cblock_t *txbuf;
@@ -158,12 +158,19 @@ struct I2CSlaveConfig{
size_t txbytes;
size_t txbufhead;
- uint8_t addr7; // 7-bit address of the slave
- uint16_t addr10; // used in 10-bit address mode. Set to NULL if not used
+ /**
+ * @brief Address word.
+ * @details The MSB used to switch between 10-bit and 7-bit modes
+ * (0 denotes 7-bit mode). Bits 0..9 contain slave address.
+ * Bits 10..14 ignores in 10-bit mode.
+ * Bits 7..14 ignores in 7-bot mode.
+ */
+ uint16_t address;
+ //TODO: join rw_bit, restart in one word.
uint8_t rw_bit; // this flag contain R/W bit
bool_t restart; // send restart or stop event after complete data tx/rx
- //TODO: join rw_bit, restart in one word.
+
#if I2C_USE_WAIT
/**