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| author | Tim Deegan <Tim.Deegan@citrix.com> | 2011-03-07 11:21:11 +0000 |
|---|---|---|
| committer | Tim Deegan <Tim.Deegan@citrix.com> | 2011-03-07 11:21:11 +0000 |
| commit | 794d4b9e85047aacfe23b852d3a03a8eff920aec (patch) | |
| tree | d69055821426f9154568cbae37587823f2d23997 /xen/arch/x86/x86_emulate | |
| parent | 26315747810e1a520daeb5fc0042ab083dead693 (diff) | |
| download | xen-794d4b9e85047aacfe23b852d3a03a8eff920aec.tar.gz xen-794d4b9e85047aacfe23b852d3a03a8eff920aec.tar.bz2 xen-794d4b9e85047aacfe23b852d3a03a8eff920aec.zip | |
x86: add explicit size suffixes to some assembly instructions.
This is needed to compile xen with clang.
Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'xen/arch/x86/x86_emulate')
| -rw-r--r-- | xen/arch/x86/x86_emulate/x86_emulate.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 186cef2b9b..babde81ff3 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -2678,7 +2678,7 @@ x86_emulate( emulate_fpu_insn_memsrc("fiaddl", src.val); break; case 1: /* fimul m64i */ - emulate_fpu_insn_memsrc("fimul", src.val); + emulate_fpu_insn_memsrc("fimuls", src.val); break; case 2: /* ficom m64i */ emulate_fpu_insn_memsrc("ficoml", src.val); @@ -2897,28 +2897,28 @@ x86_emulate( switch ( modrm_reg & 7 ) { case 0: /* fiadd m16i */ - emulate_fpu_insn_memsrc("fiadd", src.val); + emulate_fpu_insn_memsrc("fiadds", src.val); break; case 1: /* fimul m16i */ - emulate_fpu_insn_memsrc("fimul", src.val); + emulate_fpu_insn_memsrc("fimuls", src.val); break; case 2: /* ficom m16i */ - emulate_fpu_insn_memsrc("ficom", src.val); + emulate_fpu_insn_memsrc("ficoms", src.val); break; case 3: /* ficomp m16i */ - emulate_fpu_insn_memsrc("ficomp", src.val); + emulate_fpu_insn_memsrc("ficomps", src.val); break; case 4: /* fisub m16i */ - emulate_fpu_insn_memsrc("fisub", src.val); + emulate_fpu_insn_memsrc("fisubs", src.val); break; case 5: /* fisubr m16i */ - emulate_fpu_insn_memsrc("fisubr", src.val); + emulate_fpu_insn_memsrc("fisubrs", src.val); break; case 6: /* fidiv m16i */ - emulate_fpu_insn_memsrc("fidiv", src.val); + emulate_fpu_insn_memsrc("fidivs", src.val); break; case 7: /* fidivr m16i */ - emulate_fpu_insn_memsrc("fidivr", src.val); + emulate_fpu_insn_memsrc("fidivrs", src.val); break; default: goto cannot_emulate; @@ -2950,25 +2950,25 @@ x86_emulate( if ( (rc = ops->read(src.mem.seg, src.mem.off, &src.val, src.bytes, ctxt)) != 0 ) goto done; - emulate_fpu_insn_memsrc("fild", src.val); + emulate_fpu_insn_memsrc("filds", src.val); break; case 1: /* fisttp m16i */ ea.bytes = 2; dst = ea; dst.type = OP_MEM; - emulate_fpu_insn_memdst("fisttp", dst.val); + emulate_fpu_insn_memdst("fisttps", dst.val); break; case 2: /* fist m16i */ ea.bytes = 2; dst = ea; dst.type = OP_MEM; - emulate_fpu_insn_memdst("fist", dst.val); + emulate_fpu_insn_memdst("fists", dst.val); break; case 3: /* fistp m16i */ ea.bytes = 2; dst = ea; dst.type = OP_MEM; - emulate_fpu_insn_memdst("fistp", dst.val); + emulate_fpu_insn_memdst("fistps", dst.val); break; case 4: /* fbld m80dec */ ea.bytes = 10; |