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| author | Tim Deegan <tim@xen.org> | 2013-03-28 10:07:48 +0000 |
|---|---|---|
| committer | Ian Campbell <ian.campbell@citrix.com> | 2013-04-11 14:25:30 +0100 |
| commit | 7186e6718e70250900f934f6f95a5c60edffbfa6 (patch) | |
| tree | 228086c9d4e7f9dd0919249c104dc0f48eb84da6 | |
| parent | b952c687fa17d4eab4b59f9dbb215c1e4a644fbf (diff) | |
| download | xen-7186e6718e70250900f934f6f95a5c60edffbfa6.tar.gz xen-7186e6718e70250900f934f6f95a5c60edffbfa6.tar.bz2 xen-7186e6718e70250900f934f6f95a5c60edffbfa6.zip | |
arm: fix comment in HTCR setup.
Reported-by: Gihun Jung <gihun.jung@gmail.com>
Signed-off-by: Tim Deegan <tim@xen.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
| -rw-r--r-- | xen/arch/arm/arm32/head.S | 2 | ||||
| -rw-r--r-- | xen/arch/arm/arm64/head.S | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index db3baa0c25..f2f581da97 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -189,7 +189,7 @@ skip_bss: /* Set up the HTCR: * PT walks use Outer-Shareable accesses, - * PT walks are write-back, no-write-allocate in both cache levels, + * PT walks are write-back, write-allocate in both cache levels, * Full 32-bit address space goes through this table. */ ldr r0, =0x80002500 mcr CP32(r0, HTCR) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index b7ab251385..bbde419d5e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -173,7 +173,7 @@ skip_bss: * PASize -- 4G * Top byte is used * PT walks use Outer-Shareable accesses, - * PT walks are write-back, no-write-allocate in both cache levels, + * PT walks are write-back, write-allocate in both cache levels, * Full 64-bit address space goes through this table. */ ldr x0, =0x80802500 msr tcr_el2, x0 |