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| author | Ian Campbell <ian.campbell@citrix.com> | 2013-09-16 21:39:22 +0100 |
|---|---|---|
| committer | Ian Campbell <ian.campbell@citrix.com> | 2013-09-27 16:49:51 +0100 |
| commit | 5cb9d1510c75e910e5a5a29ea23af90fc2e40463 (patch) | |
| tree | f27fbbacce1bf77be7dd205af0c8c45da4a64042 | |
| parent | 9a7aada6811a9777d10ac67eb53b5985cd70a509 (diff) | |
| download | xen-5cb9d1510c75e910e5a5a29ea23af90fc2e40463.tar.gz xen-5cb9d1510c75e910e5a5a29ea23af90fc2e40463.tar.bz2 xen-5cb9d1510c75e910e5a5a29ea23af90fc2e40463.zip | |
xen: arm: configure TCR_EL2 for 40 bit physical address space
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Tim Deegan <tim@xen.org>
| -rw-r--r-- | xen/arch/arm/arm64/head.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 062645ed77..b8b5902b58 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -224,12 +224,12 @@ skip_bss: msr mair_el2, x0 /* Set up the HTCR: - * PASize -- 4G + * PASize -- 40 bits / 1TB * Top byte is used * PT walks use Outer-Shareable accesses, * PT walks are write-back, write-allocate in both cache levels, * Full 64-bit address space goes through this table. */ - ldr x0, =0x80802500 + ldr x0, =0x80822500 msr tcr_el2, x0 /* Set up the SCTLR_EL2: |