From 5cb9d1510c75e910e5a5a29ea23af90fc2e40463 Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Mon, 16 Sep 2013 21:39:22 +0100 Subject: xen: arm: configure TCR_EL2 for 40 bit physical address space Signed-off-by: Ian Campbell Acked-by: Julien Grall Acked-by: Tim Deegan --- xen/arch/arm/arm64/head.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 062645ed77..b8b5902b58 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -224,12 +224,12 @@ skip_bss: msr mair_el2, x0 /* Set up the HTCR: - * PASize -- 4G + * PASize -- 40 bits / 1TB * Top byte is used * PT walks use Outer-Shareable accesses, * PT walks are write-back, write-allocate in both cache levels, * Full 64-bit address space goes through this table. */ - ldr x0, =0x80802500 + ldr x0, =0x80822500 msr tcr_el2, x0 /* Set up the SCTLR_EL2: -- cgit v1.2.3