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* ath79: resolve GPIO address conflictsDavid Bauer2021-07-011-1/+1
| | | | | | | | | | | | | | | The ar71xx GPIO driver only uses 0x24 registers, all following GPIO registers are using to control pinmux functions, which are not handles by the GPIO driver but the generic Linux pinctrl driver. For some SoC conflicting address ranges were defined for these (AR7240 & AR9330). Resolve these cases and align the address space of the GPIO controller between all SoCs, as the used address space of the driver is identical for all these. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: enable UART in SoC DTSI filesAdrian Schmutzler2021-02-241-2/+4
| | | | | | | | | | | | | | | The uart node is enabled on all devices except one (GL-USB150 *). Thus, let's not have a few hundred nodes to enable it, but do not disable it in the first place. Where the majority of devices is using it, also move the serial0 alias to the DTSI. *) Since GL-USB150 even defines serial0 alias, the missing uart is probably just a mistake. Anyway, disable it for now so this patch stays cosmetic. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: remove ar934x MDIO reset from MAC nodeDavid Bauer2020-12-021-2/+2
| | | | | | | | | | | Remove the MDIO reset from the MAC mode for the AR934x SoC family. The reset is currently also defined for the MDIO node, where the reset is acquired exclusively. In case the ethernet node is enabled, this triggers a warning, as the reset is already acquired by the MAC. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: move ath79-clk.h include to ath79.dtsiAdrian Schmutzler2020-09-251-2/+0
| | | | | | | | | | ath79.dtsi uses ATH79_CLK_MDIO, so the include <dt-bindings/clock/ath79-clk.h> needs to be moved there. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: rearrange nand node by register addressSungbo Eo2020-07-021-18/+18
| | | | | | | All other nodes in the DTS are placed in order of address space. Harmonize the nand nodes as well. Signed-off-by: Sungbo Eo <mans0n@gorani.run>
* ath79: Make upstream ag71xx driver workHauke Mehrtens2020-02-281-2/+6
| | | | | | | | * Fix some bugs in the driver * Add missing clock and reset references in dts * Rename mdio-bus to mdio so the driver find it Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ath79: add support for Atheros AR934x HS UARTDaniel Golle2020-02-071-0/+13
| | | | | | | | | AR934x chips also got the 'old' qca,ar9330-uart in addition to the 'new' ns16550a compatible one. Add support for UART1 clock selector as well as device-tree bindings in ar934x.dtsi to make use of that uart. Reported-by: Piotr Dymacz <pepe2k@gmail.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ath79: add new ar934x spi driverChuanhong Guo2020-02-061-2/+1
| | | | | | | | | | | A new shift mode was introduced since ar934x which has a way better performance than current bitbang driver and can handle higher spi clock properly. This commit adds a new driver to make use of this new feature. This new driver has chipselect properly configured and we don't need cs-gpios hack in dts anymore. Remove them. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar934x: use reset for usb-phy-analogJohann Neuhauser2020-01-151-2/+2
| | | | | | | | | | | | This was already available on ar71xx, but is missing on ath79. This solves the slow usb speed on TP-Link WDR3600/WDR4300 and similar, as reported in Flyspray [0], OpenWRT Forum [1] and GitHub PR [2]. [0] https://bugs.openwrt.org/index.php?do=details&task_id=2567 [1] https://forum.openwrt.org/t/usb-wdr4300-low-speed-on-external-storage/46794 [2] https://github.com/openwrt/openwrt/pull/964 Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
* ath79: add AR934x NAND Flash Controller driverMichal Cieslakiewicz2019-10-201-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains updated driver for Atheros NAND Flash Controller written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc'). ath79 version has adapted to work with kernel 4.19 and Device Tree. It has also been renamed to 'ar934x-nand' to avoid confusion with Near-Field Communication technology. Controller is present on Atheros AR934x SoCs and required for accessing internal flash storage on routers like Netgear WNDR4300. This port preserves all NAND programming code while moving platform configuration to Device Tree and replacing some kernel functions marked for retirement by 4.19. Suitable definition is included in 'ar934x.dtsi' ('nand@1b000200' section). Most important changes to ar71xx version are: * old kernel sections of code removed * 'bool swap_dma' provided by platform data is now set by boolean DT property 'qca,nand-swap-dma' * board-supplied (mach-*.c code) platform data removed - its elements become either unused, redundant or replaced by DT methods (like reset) * IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore * calls to deprecated nand_scan_ident() + nand_scan_tail() function pair replaced by using recommended nand_scan() with attach_chip() callback * ECC is set to hardware by default, can be overriden by standard DT 'nand-ecc-*' properties (software Hamming or BCH are other options) This driver has been successfully tested on Netgear WNDR4300 running experimental ath79 OpenWrt master branch. Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl> [add reset control] Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: ar93xx/qca95xx: move gmac/wmac/pcie node out of apb busChuanhong Guo2019-07-161-10/+10
| | | | | | | | according to functional block diagram in datasheet, these devices don't belong to apb bus. Move these nodes out to match datasheet description. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: dts: drop "simple-mfd" for gmacs in SoC dtsiChuanhong Guo2019-06-051-1/+1
| | | | | | | | | | | | With a proper probe deferring for ag71xx we don't need to explicitly probe mdio1 before gmac0. Drop all "simple-mfd" in SoC dtsi so that gmac orders can be the same as ar71xx. This makes eth0/eth1 order the same as those in ar71xx, which means we don't need a migration script for this anymore and we can merge incorrectly split gmac/mdio driver back together. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: use ar8216 for builtin switchChuanhong Guo2019-03-241-2/+3
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar934x: assert mac/mdio reset together for gmac0Chuanhong Guo2019-03-051-6/+3
| | | | | | This allows resetting gmac registers during initialization. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: fix dts warningsMathias Kresin2018-08-081-2/+3
| | | | | | | Fix all issues found by the devicetree compiler like wrong address/size cells as well as wrong/missing/superfluous unit addresses. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: Add switch reset definition in dtsChuanhong Guo2018-07-301-0/+2
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar934x: Update dts for current ag71xx driverChuanhong Guo2018-07-301-2/+28
| | | | | | | | | Enable mdio1 by default because mdio1 is needed when eth1 is enabled. PS: If a ar9341 device has only one port and you only want to use gmac0, change compatible of gmac1 to "syscon", "simple-mfd" in dts. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: Fix mac reset and gmac compatible in ar934x.dtsiChuanhong Guo2018-07-301-5/+11
| | | | | | | Also add phy-mode and fixed-link as gmac1 is always connected to the builtin switch. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar934x: use irq-ath79-intc driver and enable wmacJohann Neuhauser2018-06-201-6/+7
| | | | Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
* ath79: preliminary support for TP-Link WDR3600 / WDR4300 (AR9344)Johann Neuhauser2018-05-221-0/+219
working: - leds - buttons - lan / wan - usb (hub port 1 + 2) - wifi 5g - sysupgrade - ... not working: - wifi 2g Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>