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authorJohann Neuhauser <johann@it-neuhauser.de>2018-05-18 18:06:03 +0200
committerJohn Crispin <john@phrozen.org>2018-05-22 20:53:15 +0200
commita7e1e919afa9659f66dada5e69d1b162f447ced7 (patch)
tree18d949d909bca4f07d74df18bacf72ba92d70962 /target/linux/ath79/dts/ar934x.dtsi
parentfaf0a460c4b8d77bed270156a4454b964a551c95 (diff)
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ath79: preliminary support for TP-Link WDR3600 / WDR4300 (AR9344)
working: - leds - buttons - lan / wan - usb (hub port 1 + 2) - wifi 5g - sysupgrade - ... not working: - wifi 2g Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
Diffstat (limited to 'target/linux/ath79/dts/ar934x.dtsi')
-rw-r--r--target/linux/ath79/dts/ar934x.dtsi219
1 files changed, 219 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/ar934x.dtsi b/target/linux/ath79/dts/ar934x.dtsi
new file mode 100644
index 0000000000..b8a915f36c
--- /dev/null
+++ b/target/linux/ath79/dts/ar934x.dtsi
@@ -0,0 +1,219 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/clock/ath79-clk.h>
+
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,ar9340";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips74Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ref: ref {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-output-names = "ref";
+ };
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ apb: apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,ar9340-ddr-controller",
+ "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x12c>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns16550a";
+ reg = <0x18020000 0x2c>;
+
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_REF>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,ar9340-gpio";
+ reg = <0x18040000 0x2c>;
+
+ interrupts = <2>;
+ ngpios = <23>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pinmux: pinmux@1804002c {
+ compatible = "pinctrl-single";
+
+ reg = <0x1804002c 0x44>;
+
+ #size-cells = <0>;
+
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x1>;
+ #pinctrl-cells = <2>;
+
+ jtag_disable_pins: pinmux_jtag_disable_pins {
+ pinctrl-single,bits = <0x40 0x2 0x2>;
+ };
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,ar9340-pll", "syscon";
+ reg = <0x18050000 0x4c>;
+
+ #clock-cells = <1>;
+ clocks = <&ref>;
+ clock-names = "ref";
+ clock-output-names = "cpu", "ddr", "ahb";
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,ar9340-wdt", "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,ar9340-reset", "qca,ar7100-reset";
+ reg = <0x1806001c 0x4>;
+
+ #reset-cells = <1>;
+ };
+
+ gmac: gmac@18070000 {
+ compatible = "qca,ar9340-gmac", "qca,ar9330-gmac";
+ reg = <0x18070000 0x14>;
+ };
+ };
+
+ usb: usb@1b000000 {
+ compatible = "generic-ehci";
+ reg = <0x1b000000 0x1d8>;
+
+ interrupts = <3>;
+ resets = <&rst 5>;
+ reset-names = "usb-host";
+
+ has-transaction-translator;
+ caps-offset = <0x100>;
+
+ phy-names = "usb-phy";
+ phys = <&usb_phy>;
+
+ status = "disabled";
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,ar9340-spi", "qca,ar7100-spi";
+ reg = <0x1f000000 0x1c>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+ };
+
+ usb_phy: usb-phy {
+ compatible = "qca,ar9340-usb-phy", "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+&cpuintc {
+ qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
+ qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
+ <&ddr_ctrl 0>, <&ddr_ctrl 1>;
+};
+
+&mdio0 {
+ resets = <&rst 22>;
+ reset-names = "mdio";
+};
+
+&eth0 {
+ compatible = "qca,ar9340-eth", "syscon";
+
+ pll-data = <0x16000000 0x00000101 0x00001616>;
+ pll-reg = <0x4 0x2c 17>;
+ pll-handle = <&pll>;
+
+ resets = <&rst 8>, <&rst 9>;
+ reset-names = "mac", "phy";
+};
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+ builtin-switch;
+};
+
+&eth1 {
+ compatible = "qca,ar9340-eth", "syscon";
+
+ resets = <&rst 12>, <&rst 13>;
+ reset-names = "mac", "phy";
+};