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-rw-r--r--target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts213
-rw-r--r--target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi357
2 files changed, 570 insertions, 0 deletions
diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts
new file mode 100644
index 0000000000..a89455c613
--- /dev/null
+++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts
@@ -0,0 +1,213 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "cn71xx.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "ubnt,edgerouter-4", "cavium,cn7130";
+ model = "Ubiquiti EdgeRouter 4";
+
+ aliases {
+ /* White + Blinking Blue */
+ led-boot = &led_power_white;
+ /* Blue + Blinking White */
+ led-failsafe = &led_power_blue;
+ /* Constant Blue */
+ led-running = &led_power_blue;
+ /* Blue + Blinking White */
+ led-upgrade = &led_power_blue;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x00000000>,
+ <0x0 0x10000000>,
+ <0x0 0x20000000>,
+ <0x0 0x30000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power_blue: power_blue {
+ label = "blue:power";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ };
+
+ led_power_white: power_white {
+ label = "white:power";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ sfp: sfp {
+ compatible = "sff,sfp";
+ i2c-bus = <&twsi0>;
+ /* Pins 12, 13 and 14 gets pulled low when SFP is plugged in */
+ mod-def0-gpio = <&gpio 12 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&xhci0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&twsi0 {
+ status = "okay";
+
+ sfp_eeprom@50 {
+ compatible = "at,24c04";
+ reg = <0x50>;
+ };
+
+ sfp_eeprom@51 {
+ compatible = "at,24c04";
+ reg = <0x51>;
+ };
+};
+
+&spi {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "Macronix,mx25l6405d", "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partition@0 {
+ label = "boot0";
+ read-only;
+ reg = <0x000000 0x300000>;
+ };
+
+ partition@300000 {
+ label = "dummy";
+ read-only;
+ reg = <0x300000 0x100000>;
+ };
+
+ eeprom: partition@400000 {
+ label = "eeprom";
+ read-only;
+ reg = <0x400000 0x10000>;
+ };
+ };
+};
+
+&mmc {
+ status = "okay";
+
+ mmc-slot@0 {
+ compatible = "mmc-slot";
+ reg = <0>;
+ non-removable;
+ max-frequency = <26000000>;
+ voltage-ranges = <3300 3300>;
+ bus-width = <8>;
+ };
+};
+
+&smi0 {
+ status = "okay";
+
+ phy4: ethernet-phy@4 {
+ device_type = "ethernet-phy";
+ interrupts = <17 8>;
+ interrupt-parent = <&gpio>;
+ compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+ reg = <4>;
+ sfp = <&sfp>;
+ };
+
+ phy5: ethernet-phy@5 {
+ device_type = "ethernet-phy";
+ interrupts = <17 8>;
+ interrupt-parent = <&gpio>;
+ compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+ reg = <5>;
+ };
+
+ phy6: ethernet-phy@6 {
+ device_type = "ethernet-phy";
+ interrupts = <17 8>;
+ interrupt-parent = <&gpio>;
+ compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+ reg = <6>;
+ };
+
+ phy7: ethernet-phy@7 {
+ device_type = "ethernet-phy";
+ interrupts = <17 8>;
+ interrupt-parent = <&gpio>;
+ compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&pip {
+ status = "okay";
+
+ interface@0 {
+ status = "okay";
+
+ ethernet@0 {
+ label = "lan3";
+ status = "okay";
+ phy-mode = "sgmii";
+ phy-handle = <&phy4>;
+ mtd-mac-address = <&eeprom 0>;
+ };
+
+ ethernet@1 {
+ label = "lan0";
+ status = "okay";
+ phy-mode = "sgmii";
+ phy-handle = <&phy5>;
+ mtd-mac-address = <&eeprom 0>;
+ mtd-mac-address-increment = <(1)>;
+ };
+
+ ethernet@2 {
+ label = "lan1";
+ status = "okay";
+ phy-mode = "sgmii";
+ phy-handle = <&phy6>;
+ mtd-mac-address = <&eeprom 0>;
+ mtd-mac-address-increment = <(2)>;
+ };
+
+ ethernet@3 {
+ label = "lan2";
+ status = "okay";
+ phy-mode = "sgmii";
+ phy-handle = <&phy7>;
+ mtd-mac-address = <&eeprom 0>;
+ mtd-mac-address-increment = <(3)>;
+ };
+ };
+};
diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi
new file mode 100644
index 0000000000..4b6d1e28d3
--- /dev/null
+++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi
@@ -0,0 +1,357 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+/ {
+ compatible = "cavium,cn71xx";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&ciu>;
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ bootbus@1180000000000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "cavium,octeon-3860-bootbus";
+ reg = <0x11800 0x00 0x00 0x200>;
+ ranges = <0x00 0x00 0x10000 0x10000000 0x00>,
+ <0x01 0x00 0x10000 0x20000000 0x00>,
+ <0x02 0x00 0x10000 0x30000000 0x00>,
+ <0x03 0x00 0x10000 0x40000000 0x00>,
+ <0x04 0x00 0x10000 0x50000000 0x00>,
+ <0x05 0x00 0x10000 0x60000000 0x00>,
+ <0x06 0x00 0x10000 0x70000000 0x00>,
+ <0x07 0x00 0x10000 0x80000000 0x00>;
+ };
+
+ dma0: dma-engine@1180000000100 {
+ status = "disabled";
+ compatible = "cavium,octeon-5750-bootbus-dma";
+ reg = <0x11800 0x100 0x0 0x08>;
+ interrupts = <0 63>;
+ };
+
+ dma1: dma-engine@1180000000108 {
+ status = "disabled";
+ compatible = "cavium,octeon-5750-bootbus-dma";
+ reg = <0x11800 0x108 0x0 0x08>;
+ interrupts = <0 63>;
+ };
+
+ ciu: interrupt-controller@1070000000000 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-3860-ciu";
+ reg = <0x10700 0x00000000 0x0 0x7000>;
+ interrupt-controller;
+ };
+
+ cib0: interrupt-controller@107000000e000 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe000 0x0 0x08>, /* RAW */
+ <0x10700 0xe100 0x0 0x08>; /* EN */
+ cavium,max-bits = <23>;
+ interrupts = <1 24>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib1: interrupt-controller@107000000e200 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe200 0x0 0x08>, /* RAW */
+ <0x10700 0xe300 0x0 0x08>; /* EN */
+ cavium,max-bits = <12>;
+ interrupts = <1 52>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib2: interrupt-controller@107000000e400 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe400 0x0 0x08>, /* RAW */
+ <0x10700 0xe500 0x0 0x08>; /* EN */
+ cavium,max-bits = <6>;
+ interrupts = <1 63>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib3: interrupt-controller@107000000e600 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe600 0x0 0x08>, /* RAW */
+ <0x10700 0xe700 0x0 0x08>; /* EN */
+ cavium,max-bits = <4>;
+ interrupts = <2 16>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib4: interrupt-controller@107000000e800 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe800 0x0 0x08>, /* RAW */
+ <0x10700 0xea00 0x0 0x08>; /* EN */
+ cavium,max-bits = <11>;
+ interrupts = <1 33>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib5: interrupt-controller@107000000e900 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe900 0x00 0x08>, /* RAW */
+ <0x10700 0xeb00 0x00 0x08>; /* EN */
+ cavium,max-bits = <11>;
+ interrupts = <1 23>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib6: interrupt-controller@107000000ec00 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xec00 0x0 0x08>, /* RAW */
+ <0x10700 0xee00 0x0 0x08>; /* EN */
+ cavium,max-bits = <15>;
+ interrupts = <2 17>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ gpio: gpio-controller@1070000000800 {
+ #interrupt-cells = <2>;
+ #gpio-cells = <2>;
+ compatible = "cavium,octeon-3860-gpio";
+ reg = <0x10700 0x800 0x0 0x100>;
+ interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
+ <0 20>, <0 21>, <0 22>, <0 23>,
+ <0 24>, <0 25>, <0 26>, <0 27>,
+ <0 28>, <0 29>, <0 30>, <0 31>;
+ interrupt-controller;
+ gpio-controller;
+ };
+
+ mmc: mmc@1180000002000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-6130-mmc";
+ reg = <0x11800 0x2000 0x0 0x100>,
+ <0x11800 0x168 0x0 0x20>;
+ interrupts = <1 19>, <0 63>;
+ };
+
+ smi0: mdio@1180000001800 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-mdio";
+ reg = <0x11800 0x1800 0x0 0x40>;
+ };
+
+ smi1: mdio@1180000001900 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-mdio";
+ reg = <0x11800 0x1900 0x0 0x40>;
+ };
+
+ pip: pip@11800a0000000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-pip";
+ reg = <0x11800 0xa0000000 0x0 0x2000>;
+
+ interface@0 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-pip-interface";
+ reg = <0>; /* Interface */
+
+ ethernet@0 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <0>; /* Port */
+ };
+
+ ethernet@1 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <1>; /* Port */
+ };
+
+ ethernet@2 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <2>; /* Port */
+ };
+
+ ethernet@3 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <3>; /* Port */
+ };
+ };
+
+ interface@1 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-pip-interface";
+ reg = <1>; /* Interface */
+
+ ethernet@0 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <0>; /* Port */
+ };
+
+ ethernet@1 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <1>; /* Port */
+ };
+
+ ethernet@2 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <2>; /* Port */
+ };
+
+ ethernet@3 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <3>; /* Port */
+ };
+ };
+ };
+
+ twsi0: i2c@1180000001000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-twsi";
+ reg = <0x11800 0x1000 0x0 0x200>;
+ interrupts = <0 45>;
+ clock-frequency = <100000>;
+ };
+
+ twsi1: i2c@1180000001200 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-twsi";
+ reg = <0x11800 0x1200 0x0 0x200>;
+ interrupts = <0 59>;
+ clock-frequency = <100000>;
+ };
+
+ uctl@118006c000000 {
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "cavium,octeon-7130-sata-uctl";
+ reg = <0x11800 0x6c000000 0x00 0x100>;
+ ranges;
+
+ sata@16c0000000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-ahci";
+ reg = <0x16c00 0x00 0x00 0x200>;
+ interrupt-parent = <&cib3>;
+ interrupts = <2 4>;
+ };
+ };
+
+ usb0: uctl@1180068000000 {
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "cavium,octeon-7130-usb-uctl";
+ reg = <0x11800 0x68000000 0x00 0x100>;
+ ranges;
+ power = <0x02 0x01 0x00>;
+ refclk-frequency = <100000000>;
+ refclk-type-hs = "pll_ref_clk";
+ refclk-type-ss = "dlmc_ref_clk1";
+
+ xhci0: xhci@1680000000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
+ reg = <0x16800 0x0 0x10 0x00>;
+ interrupts = <9 4>;
+ interrupt-parent = <&cib4>;
+ };
+ };
+
+ usb1: uctl@1180069000000 {
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "cavium,octeon-7130-usb-uctl";
+ reg = <0x11800 0x69000000 0x00 0x100>;
+ ranges;
+ power = <0x02 0x02 0x01>;
+ refclk-frequency = <100000000>;
+ refclk-type-hs = "pll_ref_clk";
+ refclk-type-ss = "dlmc_ref_clk1";
+
+ xhci1: xhci@1690000000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
+ reg = <0x16900 0x0 0x10 0x00>;
+ interrupts = <9 4>;
+ interrupt-parent = <&cib5>;
+ };
+ };
+
+ uart0: serial@1180000000800 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-uart", "ns16550";
+ reg = <0x11800 0x800 0x0 0x400>;
+ reg-shift = <3>;
+ interrupts = <0 34>;
+ clock-frequency = <400000000>;
+ current-speed = <115200>;
+ };
+
+ uart1: serial@1180000000c00 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-uart", "ns16550";
+ reg = <0x11800 0xc00 0x0 0x400>;
+ reg-shift = <3>;
+ interrupts = <0 35>;
+ clock-frequency = <400000000>;
+ current-speed = <115200>;
+ };
+
+ ocla0@11800a8000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-ocla";
+ reg = <0x11800 0xa8000000 0x0 0x500000>;
+ interrupts = <0x08 0x01 0x09 0x01 0x0b 0x01>;
+ interrupt-parent = <&cib6>;
+ };
+
+ spi: spi@1070000001000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3010-spi";
+ reg = <0x10700 0x1000 0x00 0x100>;
+ interrupts = <0 58>;
+ spi-max-frequency = <100000000>;
+ };
+ };
+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-30 06:10:57 +0000