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Diffstat (limited to 'target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi')
-rw-r--r--target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi357
1 files changed, 357 insertions, 0 deletions
diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi
new file mode 100644
index 0000000000..4b6d1e28d3
--- /dev/null
+++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi
@@ -0,0 +1,357 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+/ {
+ compatible = "cavium,cn71xx";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&ciu>;
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ bootbus@1180000000000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "cavium,octeon-3860-bootbus";
+ reg = <0x11800 0x00 0x00 0x200>;
+ ranges = <0x00 0x00 0x10000 0x10000000 0x00>,
+ <0x01 0x00 0x10000 0x20000000 0x00>,
+ <0x02 0x00 0x10000 0x30000000 0x00>,
+ <0x03 0x00 0x10000 0x40000000 0x00>,
+ <0x04 0x00 0x10000 0x50000000 0x00>,
+ <0x05 0x00 0x10000 0x60000000 0x00>,
+ <0x06 0x00 0x10000 0x70000000 0x00>,
+ <0x07 0x00 0x10000 0x80000000 0x00>;
+ };
+
+ dma0: dma-engine@1180000000100 {
+ status = "disabled";
+ compatible = "cavium,octeon-5750-bootbus-dma";
+ reg = <0x11800 0x100 0x0 0x08>;
+ interrupts = <0 63>;
+ };
+
+ dma1: dma-engine@1180000000108 {
+ status = "disabled";
+ compatible = "cavium,octeon-5750-bootbus-dma";
+ reg = <0x11800 0x108 0x0 0x08>;
+ interrupts = <0 63>;
+ };
+
+ ciu: interrupt-controller@1070000000000 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-3860-ciu";
+ reg = <0x10700 0x00000000 0x0 0x7000>;
+ interrupt-controller;
+ };
+
+ cib0: interrupt-controller@107000000e000 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe000 0x0 0x08>, /* RAW */
+ <0x10700 0xe100 0x0 0x08>; /* EN */
+ cavium,max-bits = <23>;
+ interrupts = <1 24>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib1: interrupt-controller@107000000e200 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe200 0x0 0x08>, /* RAW */
+ <0x10700 0xe300 0x0 0x08>; /* EN */
+ cavium,max-bits = <12>;
+ interrupts = <1 52>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib2: interrupt-controller@107000000e400 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe400 0x0 0x08>, /* RAW */
+ <0x10700 0xe500 0x0 0x08>; /* EN */
+ cavium,max-bits = <6>;
+ interrupts = <1 63>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib3: interrupt-controller@107000000e600 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe600 0x0 0x08>, /* RAW */
+ <0x10700 0xe700 0x0 0x08>; /* EN */
+ cavium,max-bits = <4>;
+ interrupts = <2 16>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib4: interrupt-controller@107000000e800 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe800 0x0 0x08>, /* RAW */
+ <0x10700 0xea00 0x0 0x08>; /* EN */
+ cavium,max-bits = <11>;
+ interrupts = <1 33>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib5: interrupt-controller@107000000e900 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xe900 0x00 0x08>, /* RAW */
+ <0x10700 0xeb00 0x00 0x08>; /* EN */
+ cavium,max-bits = <11>;
+ interrupts = <1 23>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ cib6: interrupt-controller@107000000ec00 {
+ #interrupt-cells = <2>;
+ compatible = "cavium,octeon-7130-cib";
+ reg = <0x10700 0xec00 0x0 0x08>, /* RAW */
+ <0x10700 0xee00 0x0 0x08>; /* EN */
+ cavium,max-bits = <15>;
+ interrupts = <2 17>;
+ interrupt-parent = <&ciu>;
+ interrupt-controller;
+ };
+
+ gpio: gpio-controller@1070000000800 {
+ #interrupt-cells = <2>;
+ #gpio-cells = <2>;
+ compatible = "cavium,octeon-3860-gpio";
+ reg = <0x10700 0x800 0x0 0x100>;
+ interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
+ <0 20>, <0 21>, <0 22>, <0 23>,
+ <0 24>, <0 25>, <0 26>, <0 27>,
+ <0 28>, <0 29>, <0 30>, <0 31>;
+ interrupt-controller;
+ gpio-controller;
+ };
+
+ mmc: mmc@1180000002000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-6130-mmc";
+ reg = <0x11800 0x2000 0x0 0x100>,
+ <0x11800 0x168 0x0 0x20>;
+ interrupts = <1 19>, <0 63>;
+ };
+
+ smi0: mdio@1180000001800 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-mdio";
+ reg = <0x11800 0x1800 0x0 0x40>;
+ };
+
+ smi1: mdio@1180000001900 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-mdio";
+ reg = <0x11800 0x1900 0x0 0x40>;
+ };
+
+ pip: pip@11800a0000000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-pip";
+ reg = <0x11800 0xa0000000 0x0 0x2000>;
+
+ interface@0 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-pip-interface";
+ reg = <0>; /* Interface */
+
+ ethernet@0 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <0>; /* Port */
+ };
+
+ ethernet@1 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <1>; /* Port */
+ };
+
+ ethernet@2 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <2>; /* Port */
+ };
+
+ ethernet@3 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <3>; /* Port */
+ };
+ };
+
+ interface@1 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-pip-interface";
+ reg = <1>; /* Interface */
+
+ ethernet@0 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <0>; /* Port */
+ };
+
+ ethernet@1 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <1>; /* Port */
+ };
+
+ ethernet@2 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <2>; /* Port */
+ };
+
+ ethernet@3 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-pip-port";
+ reg = <3>; /* Port */
+ };
+ };
+ };
+
+ twsi0: i2c@1180000001000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-twsi";
+ reg = <0x11800 0x1000 0x0 0x200>;
+ interrupts = <0 45>;
+ clock-frequency = <100000>;
+ };
+
+ twsi1: i2c@1180000001200 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3860-twsi";
+ reg = <0x11800 0x1200 0x0 0x200>;
+ interrupts = <0 59>;
+ clock-frequency = <100000>;
+ };
+
+ uctl@118006c000000 {
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "cavium,octeon-7130-sata-uctl";
+ reg = <0x11800 0x6c000000 0x00 0x100>;
+ ranges;
+
+ sata@16c0000000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-ahci";
+ reg = <0x16c00 0x00 0x00 0x200>;
+ interrupt-parent = <&cib3>;
+ interrupts = <2 4>;
+ };
+ };
+
+ usb0: uctl@1180068000000 {
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "cavium,octeon-7130-usb-uctl";
+ reg = <0x11800 0x68000000 0x00 0x100>;
+ ranges;
+ power = <0x02 0x01 0x00>;
+ refclk-frequency = <100000000>;
+ refclk-type-hs = "pll_ref_clk";
+ refclk-type-ss = "dlmc_ref_clk1";
+
+ xhci0: xhci@1680000000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
+ reg = <0x16800 0x0 0x10 0x00>;
+ interrupts = <9 4>;
+ interrupt-parent = <&cib4>;
+ };
+ };
+
+ usb1: uctl@1180069000000 {
+ status = "disabled";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "cavium,octeon-7130-usb-uctl";
+ reg = <0x11800 0x69000000 0x00 0x100>;
+ ranges;
+ power = <0x02 0x02 0x01>;
+ refclk-frequency = <100000000>;
+ refclk-type-hs = "pll_ref_clk";
+ refclk-type-ss = "dlmc_ref_clk1";
+
+ xhci1: xhci@1690000000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
+ reg = <0x16900 0x0 0x10 0x00>;
+ interrupts = <9 4>;
+ interrupt-parent = <&cib5>;
+ };
+ };
+
+ uart0: serial@1180000000800 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-uart", "ns16550";
+ reg = <0x11800 0x800 0x0 0x400>;
+ reg-shift = <3>;
+ interrupts = <0 34>;
+ clock-frequency = <400000000>;
+ current-speed = <115200>;
+ };
+
+ uart1: serial@1180000000c00 {
+ status = "disabled";
+ compatible = "cavium,octeon-3860-uart", "ns16550";
+ reg = <0x11800 0xc00 0x0 0x400>;
+ reg-shift = <3>;
+ interrupts = <0 35>;
+ clock-frequency = <400000000>;
+ current-speed = <115200>;
+ };
+
+ ocla0@11800a8000000 {
+ status = "disabled";
+ compatible = "cavium,octeon-7130-ocla";
+ reg = <0x11800 0xa8000000 0x0 0x500000>;
+ interrupts = <0x08 0x01 0x09 0x01 0x0b 0x01>;
+ interrupt-parent = <&cib6>;
+ };
+
+ spi: spi@1070000001000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "cavium,octeon-3010-spi";
+ reg = <0x10700 0x1000 0x00 0x100>;
+ interrupts = <0 58>;
+ spi-max-frequency = <100000000>;
+ };
+ };
+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-27 18:18:33 +0000