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authorBart Lauret <bblauret@gmail.com>2019-02-25 19:27:28 +0100
committerChristian Lamparter <chunkeey@gmail.com>2019-02-28 11:32:55 +0100
commit438605454980ee815a506a9a2a4a3532ab378922 (patch)
tree3d3a1e0f4d774c3f52808a1eb765c6e14abb77fa /target/linux/ath79/dts
parent34b10b468e0999f1739931ae8faf7e8e1002c2e8 (diff)
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ath79: add support for TP-Link Archer C5 v1
TP-Link Archer C5 v1 is a dual band router based on Qualcomm/Atheros QCA9558 + QCA9880. Specification: - 720 MHz CPU - 128 MB of RAM (Various chips) - 16 MB of FLASH (Various chips) - SoC QCA9558 integrated 3T3R 2.4 GHz Wi-Fi - minipcie slot with 3T3R 5 GHz QCA9880-BR4A - 5x 10/100/1000 Mbps Ethernet (AR8327N Switch) - 10x LEDs, 2x software buttons For further informwation on the device, visit the wiki: <https://openwrt.org/toh/tp-link/archer-c5-c7-wdr7500> Signed-off-by: Bart Lauret <bblauret@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts46
1 files changed, 46 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts b/target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts
new file mode 100644
index 0000000000..05368bd7df
--- /dev/null
+++ b/target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca9558_tplink_archer-c7.dtsi"
+
+/ {
+ compatible = "tplink,archer-c5-v1", "qca,qca9558";
+ model = "TP-Link Archer C5 v1";
+};
+
+&gpio_keys {
+ rfkill {
+ gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RFKILL>;
+ linux,input-type = <EV_SW>;
+ debounce-interval = <60>;
+ };
+};
+
+&gpio_leds {
+ wlan5g {
+ label = "tp-link:green:wlan5g";
+ gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+};
+
+&mtdparts {
+ uboot: u-boot@0 {
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ firmware@20000 {
+ reg = <0x020000 0xfd0000>;
+ compatible = "tplink,firmware";
+ };
+
+ art: art@ff0000 {
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+};