diff options
Diffstat (limited to 'target/linux/mvebu/patches-4.0')
18 files changed, 1770 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.0/001-add_mamba_support.patch b/target/linux/mvebu/patches-4.0/001-add_mamba_support.patch new file mode 100644 index 0000000..0fc2638 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/001-add_mamba_support.patch @@ -0,0 +1,388 @@ +From 4824140f4bd1caaf900215aabe27e4bdd1677704 Mon Sep 17 00:00:00 2001 +From: Imre Kaloz <kaloz@openwrt.org> +Date: Mon, 16 Feb 2015 13:31:04 +0100 +Subject: [PATCH] ARM: mvebu: add Linksys WRT1900AC (Mamba) support + +The Linksys WRT1900AC (Mamba) is a router that has + +- 2 mini-PCIe slots with Marvell 88W8864 radios +- 1 USB 3.0 port +- 1 USB 2.0/eSATAp port +- 2 Ethernet interfaces connected to a 88E6172 switch (1x WAN + 4x LAN) +- 128MB NAND flash +- 256MB RAM + +gregory.clement@free-electrons.com: - add ARM to the title + - fix the reference to CONFIG_DEBUG_MVEBU_UART0_ALTERNATE + - fix the unbalanced comment for the syscfg partition + +Signed-off-by: Imre Kaloz <kaloz@openwrt.org> +Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> +Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 348 ++++++++++++++++++++++++++ + 2 files changed, 349 insertions(+) + create mode 100644 arch/arm/boot/dts/armada-xp-linksys-mamba.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -629,6 +629,7 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \ + armada-xp-db.dtb \ + armada-xp-gp.dtb \ + armada-xp-lenovo-ix4-300d.dtb \ ++ armada-xp-linksys-mamba.dtb \ + armada-xp-matrix.dtb \ + armada-xp-netgear-rn2120.dtb \ + armada-xp-openblocks-ax3-4.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -0,0 +1,348 @@ ++/* ++ * Device Tree file for the Linksys WRT1900AC (Mamba). ++ * ++ * Note: this board is shipped with a new generation boot loader that ++ * remaps internal registers at 0xf1000000. Therefore, if earlyprintk ++ * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be ++ * used. ++ * ++ * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org> ++ * ++ * Based on armada-xp-axpwifiap.dts: ++ * ++ * Copyright (C) 2013 Marvell ++ * ++ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without ++ * any warranty of any kind, whether express or implied. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/input/input.h> ++#include "armada-xp-mv78230.dtsi" ++ ++/ { ++ model = "Linksys WRT1900AC"; ++ compatible = "linksys,mamba", "marvell,armadaxp-mv78230", ++ "marvell,armadaxp", "marvell,armada-370-xp"; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200"; ++ stdout-path = &uart0; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */ ++ }; ++ ++ soc { ++ ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 ++ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; ++ ++ pcie-controller { ++ status = "okay"; ++ ++ /* Etron EJ168 USB 3.0 controller */ ++ pcie@1,0 { ++ /* Port 0, Lane 0 */ ++ status = "okay"; ++ }; ++ ++ /* First mini-PCIe port */ ++ pcie@2,0 { ++ /* Port 0, Lane 1 */ ++ status = "okay"; ++ }; ++ ++ /* Second mini-PCIe port */ ++ pcie@3,0 { ++ /* Port 0, Lane 3 */ ++ status = "okay"; ++ }; ++ }; ++ ++ internal-regs { ++ ++ /* J10: VCC, NC, RX, NC, TX, GND */ ++ serial@12000 { ++ status = "okay"; ++ }; ++ ++ sata@a0000 { ++ nr-ports = <1>; ++ status = "okay"; ++ }; ++ ++ ethernet@70000 { ++ pinctrl-0 = <&ge0_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii-id"; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ ethernet@74000 { ++ pinctrl-0 = <&ge1_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii-id"; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ /* USB part of the eSATA/USB 2.0 port */ ++ usb@50000 { ++ status = "okay"; ++ }; ++ ++ i2c@11000 { ++ status = "okay"; ++ clock-frequency = <100000>; ++ ++ tmp421@4c { ++ compatible = "ti,tmp421"; ++ reg = <0x4c>; ++ }; ++ ++ tlc59116@68 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #gpio-cells = <2>; ++ compatible = "ti,tlc59116"; ++ reg = <0x68>; ++ ++ wan_amber@0 { ++ label = "mamba:amber:wan"; ++ reg = <0x0>; ++ }; ++ ++ wan_white@1 { ++ label = "mamba:white:wan"; ++ reg = <0x1>; ++ }; ++ ++ wlan_2g@2 { ++ label = "mamba:white:wlan_2g"; ++ reg = <0x2>; ++ }; ++ ++ wlan_5g@3 { ++ label = "mamba:white:wlan_5g"; ++ reg = <0x3>; ++ }; ++ ++ esata@4 { ++ label = "mamba:white:esata"; ++ reg = <0x4>; ++ }; ++ ++ usb2@5 { ++ label = "mamba:white:usb2"; ++ reg = <0x5>; ++ }; ++ ++ usb3_1@6 { ++ label = "mamba:white:usb3_1"; ++ reg = <0x6>; ++ }; ++ ++ usb3_2@7 { ++ label = "mamba:white:usb3_2"; ++ reg = <0x7>; ++ }; ++ ++ wps_white@8 { ++ label = "mamba:white:wps"; ++ reg = <0x8>; ++ }; ++ ++ wps_amber@9 { ++ label = "mamba:amber:wps"; ++ reg = <0x9>; ++ }; ++ }; ++ }; ++ ++ nand@d0000 { ++ status = "okay"; ++ num-cs = <1>; ++ marvell,nand-keep-config; ++ marvell,nand-enable-arbiter; ++ nand-on-flash-bbt; ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x0000000 0x100000>; /* 1MB */ ++ read-only; ++ }; ++ ++ partition@100000 { ++ label = "u_env"; ++ reg = <0x100000 0x40000>; /* 256KB */ ++ }; ++ ++ partition@140000 { ++ label = "s_env"; ++ reg = <0x140000 0x40000>; /* 256KB */ ++ }; ++ ++ partition@900000 { ++ label = "devinfo"; ++ reg = <0x900000 0x100000>; /* 1MB */ ++ read-only; ++ }; ++ ++ /* kernel1 overlaps with rootfs1 by design */ ++ partition@a00000 { ++ label = "kernel1"; ++ reg = <0xa00000 0x2800000>; /* 40MB */ ++ }; ++ ++ partition@d00000 { ++ label = "rootfs1"; ++ reg = <0xd00000 0x2500000>; /* 37MB */ ++ }; ++ ++ /* kernel2 overlaps with rootfs2 by design */ ++ partition@3200000 { ++ label = "kernel2"; ++ reg = <0x3200000 0x2800000>; /* 40MB */ ++ }; ++ ++ partition@3500000 { ++ label = "rootfs2"; ++ reg = <0x3500000 0x2500000>; /* 37MB */ ++ }; ++ ++ /* ++ * 38MB, last MB is for the BBT, not writable ++ */ ++ partition@5a00000 { ++ label = "syscfg"; ++ reg = <0x5a00000 0x2600000>; ++ }; ++ ++ /* ++ * Unused area between "s_env" and "devinfo". ++ * Moved here because otherwise the renumbered ++ * partitions would break the bootloader ++ * supplied bootargs ++ */ ++ partition@180000 { ++ label = "unused_area"; ++ reg = <0x180000 0x780000>; /* 7.5MB */ ++ }; ++ }; ++ ++ spi0: spi@10600 { ++ status = "okay"; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "everspin,mr25h256"; ++ reg = <0>; /* Chip select 0 */ ++ spi-max-frequency = <40000000>; ++ }; ++ }; ++ }; ++ }; ++ ++ gpio_keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-0 = <&keys_pin>; ++ pinctrl-names = "default"; ++ ++ button@1 { ++ label = "WPS"; ++ linux,code = <KEY_WPS_BUTTON>; ++ gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; ++ }; ++ ++ button@2 { ++ label = "Factory Reset Button"; ++ linux,code = <KEY_RESTART>; ++ gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&power_led_pin>; ++ pinctrl-names = "default"; ++ ++ power { ++ label = "mamba:white:power"; ++ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ }; ++ ++ gpio_fan { ++ /* SUNON HA4010V4-0000-C99 */ ++ compatible = "gpio-fan"; ++ gpios = <&gpio0 24 0>; ++ ++ gpio-fan,speed-map = <0 0 ++ 4500 1>; ++ }; ++}; ++ ++&pinctrl { ++ ++ keys_pin: keys-pin { ++ marvell,pins = "mpp32", "mpp33"; ++ marvell,function = "gpio"; ++ }; ++ ++ power_led_pin: power-led-pin { ++ marvell,pins = "mpp40"; ++ marvell,function = "gpio"; ++ }; ++ ++ gpio_fan_pin: gpio-fan-pin { ++ marvell,pins = "mpp24"; ++ marvell,function = "gpio"; ++ }; ++}; diff --git a/target/linux/mvebu/patches-4.0/002-add_mamba_powertables.patch b/target/linux/mvebu/patches-4.0/002-add_mamba_powertables.patch new file mode 100644 index 0000000..6b51e48 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/002-add_mamba_powertables.patch @@ -0,0 +1,103 @@ +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -84,12 +84,100 @@ + pcie@2,0 { + /* Port 0, Lane 1 */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,5ghz = <0>; ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ FCC = ++ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; ++ ++ ETSI = ++ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; + }; + + /* Second mini-PCIe port */ + pcie@3,0 { + /* Port 0, Lane 3 */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,2ghz = <0>; ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ FCC = ++ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; ++ ++ ETSI = ++ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; ++ }; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-4.0/003-add_mamba_switch.patch b/target/linux/mvebu/patches-4.0/003-add_mamba_switch.patch new file mode 100644 index 0000000..e43d164 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/003-add_mamba_switch.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -415,6 +415,16 @@ + gpio-fan,speed-map = <0 0 + 4500 1>; + }; ++ ++ mvsw61xx { ++ compatible = "marvell,88e6172"; ++ status = "okay"; ++ reg = <0x10>; ++ ++ mii-bus = <&mdio>; ++ cpu-port-0 = <5>; ++ cpu-port-1 = <6>; ++ }; + }; + + &pinctrl { diff --git a/target/linux/mvebu/patches-4.0/005-build_linksys_a385_dts.patch b/target/linux/mvebu/patches-4.0/005-build_linksys_a385_dts.patch new file mode 100644 index 0000000..960a9fa --- /dev/null +++ b/target/linux/mvebu/patches-4.0/005-build_linksys_a385_dts.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -621,6 +621,8 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ + armada-375-db.dtb + dtb-$(CONFIG_MACH_ARMADA_38X) += \ + armada-385-db-ap.dtb \ ++ armada-385-linksys-caiman.dtb \ ++ armada-385-linksys-cobra.dtb \ + armada-388-db.dtb \ + armada-388-gp.dtb \ + armada-388-rd.dtb diff --git a/target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch b/target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch new file mode 100644 index 0000000..3c4a111 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch @@ -0,0 +1,34 @@ +From 7eb1f09ec8e25aa2fc3f6fc5fc9405d9f917d503 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@free-electrons.com> +Date: Thu, 11 Dec 2014 14:14:58 +0100 +Subject: [PATCH 1/2] ARM: mvebu: A385-AP: Enable the NAND controller + +The A385 AP has a 1GB NAND chip. Enable it. + +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +--- + arch/arm/boot/dts/armada-385-db-ap.dts | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/arm/boot/dts/armada-385-db-ap.dts ++++ b/arch/arm/boot/dts/armada-385-db-ap.dts +@@ -150,6 +150,19 @@ + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; ++ ++ nfc: flash@d0000 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ num-cs = <1>; ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ marvell,nand-keep-config; ++ marvell,nand-enable-arbiter; ++ nand-on-flash-bbt; ++ }; + }; + + pcie-controller { diff --git a/target/linux/mvebu/patches-4.0/050-leds_tlc59116_document_binding.patch b/target/linux/mvebu/patches-4.0/050-leds_tlc59116_document_binding.patch new file mode 100644 index 0000000..e55eca3 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/050-leds_tlc59116_document_binding.patch @@ -0,0 +1,51 @@ +Document the binding for the TLC59116 LED driver. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + .../devicetree/bindings/leds/leds-tlc59116.txt | 40 ++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + create mode 100644 Documentation/devicetree/bindings/leds/leds-tlc59116.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/leds/leds-tlc59116.txt +@@ -0,0 +1,40 @@ ++LEDs connected to tcl59116 ++ ++Required properties ++- compatible: should be "ti,tlc59116" ++- #address-cells: must be 1 ++- #size-cells: must be 0 ++- reg: typically 0x68 ++ ++Each led is represented as a sub-node of the ti,,tlc59116. ++See Documentation/devicetree/bindings/leds/common.txt ++ ++LED sub-node properties: ++- reg: number of LED line, 0 to 15 ++- label: (optional) name of LED ++- linux,default-trigger : (optional) ++ ++Examples: ++ ++tlc59116@68 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "ti,tlc59116"; ++ reg = <0x68>; ++ ++ wan@0 { ++ label = "wrt1900ac:amber:wan"; ++ reg = <0x0>; ++ }; ++ ++ 2g@2 { ++ label = "wrt1900ac:white:2g"; ++ reg = <0x2>; ++ }; ++ ++ alive@9 { ++ label = "wrt1900ac:green:alive"; ++ reg = <0x9>; ++ linux,default_trigger = "heartbeat"; ++ }; ++}; diff --git a/target/linux/mvebu/patches-4.0/051-leds_tlc59116_add_driver.patch b/target/linux/mvebu/patches-4.0/051-leds_tlc59116_add_driver.patch new file mode 100644 index 0000000..31110ad --- /dev/null +++ b/target/linux/mvebu/patches-4.0/051-leds_tlc59116_add_driver.patch @@ -0,0 +1,297 @@ +The TLC59116 is an I2C bus controlled 16-channel LED driver. Each LED +output has its own 8-bit fixed-frequency PWM controller to control the +brightness of the LED. + +This is based on a driver from Belkin, but has been extensively +rewritten. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + drivers/leds/Kconfig | 8 ++ + drivers/leds/Makefile | 1 + + drivers/leds/leds-tlc59116.c | 252 +++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 261 insertions(+) + create mode 100644 drivers/leds/leds-tlc59116.c + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -467,6 +467,14 @@ config LEDS_TCA6507 + LED driver chips accessed via the I2C bus. + Driver support brightness control and hardware-assisted blinking. + ++config LEDS_TLC59116 ++ tristate "LED driver for TLC59116F controllers" ++ depends on LEDS_CLASS && I2C ++ select REGMAP_I2C ++ help ++ This option enables support for Texas Instruments TLC59116F ++ LED controller. ++ + config LEDS_MAX8997 + tristate "LED support for MAX8997 PMIC" + depends on LEDS_CLASS && MFD_MAX8997 +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -31,6 +31,7 @@ obj-$(CONFIG_LEDS_LP8501) += leds-lp850 + obj-$(CONFIG_LEDS_LP8788) += leds-lp8788.o + obj-$(CONFIG_LEDS_LP8860) += leds-lp8860.o + obj-$(CONFIG_LEDS_TCA6507) += leds-tca6507.o ++obj-$(CONFIG_LEDS_TLC59116) += leds-tlc59116.o + obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o + obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o + obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o +--- /dev/null ++++ b/drivers/leds/leds-tlc59116.c +@@ -0,0 +1,252 @@ ++/* ++ * Copyright 2014 Belkin Inc. ++ * Copyright 2014 Andrew Lunn <andrew@lunn.ch> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ */ ++ ++#include <linux/i2c.h> ++#include <linux/leds.h> ++#include <linux/module.h> ++#include <linux/of.h> ++#include <linux/regmap.h> ++#include <linux/slab.h> ++#include <linux/workqueue.h> ++ ++#define TLC59116_LEDS 16 ++ ++#define TLC59116_REG_MODE1 0x00 ++#define MODE1_RESPON_ADDR_MASK 0xF0 ++#define MODE1_NORMAL_MODE (0 << 4) ++#define MODE1_SPEED_MODE (1 << 4) ++ ++#define TLC59116_REG_MODE2 0x01 ++#define MODE2_DIM (0 << 5) ++#define MODE2_BLINK (1 << 5) ++#define MODE2_OCH_STOP (0 << 3) ++#define MODE2_OCH_ACK (1 << 3) ++ ++#define TLC59116_REG_PWM(x) (0x02 + (x)) ++ ++#define TLC59116_REG_GRPPWM 0x12 ++#define TLC59116_REG_GRPFREQ 0x13 ++ ++/* LED Driver Output State, determine the source that drives LED outputs */ ++#define TLC59116_REG_LEDOUT(x) (0x14 + ((x) >> 2)) ++#define TLC59116_LED_OFF 0x0 /* Output LOW */ ++#define TLC59116_LED_ON 0x1 /* Output HI-Z */ ++#define TLC59116_DIM 0x2 /* Dimming */ ++#define TLC59116_BLINK 0x3 /* Blinking */ ++#define LED_MASK 0x3 ++ ++#define ldev_to_led(c) container_of(c, struct tlc59116_led, ldev) ++#define work_to_led(work) container_of(work, struct tlc59116_led, work) ++ ++struct tlc59116_led { ++ bool active; ++ struct regmap *regmap; ++ unsigned int led_no; ++ struct led_classdev ldev; ++ struct work_struct work; ++}; ++ ++struct tlc59116_priv { ++ struct tlc59116_led leds[TLC59116_LEDS]; ++}; ++ ++static int ++tlc59116_set_mode(struct regmap *regmap, u8 mode) ++{ ++ int err; ++ u8 val; ++ ++ if ((mode != MODE2_DIM) && (mode != MODE2_BLINK)) ++ mode = MODE2_DIM; ++ ++ /* Configure MODE1 register */ ++ err = regmap_write(regmap, TLC59116_REG_MODE1, MODE1_NORMAL_MODE); ++ if (err) ++ return err; ++ ++ /* Configure MODE2 Reg */ ++ val = MODE2_OCH_STOP | mode; ++ ++ return regmap_write(regmap, TLC59116_REG_MODE2, val); ++} ++ ++static int ++tlc59116_set_led(struct tlc59116_led *led, u8 val) ++{ ++ struct regmap *regmap = led->regmap; ++ unsigned int i = (led->led_no % 4) * 2; ++ unsigned int addr = TLC59116_REG_LEDOUT(led->led_no); ++ unsigned int mask = LED_MASK << i; ++ ++ val = val << i; ++ ++ return regmap_update_bits(regmap, addr, mask, val); ++} ++ ++static void ++tlc59116_led_work(struct work_struct *work) ++{ ++ struct tlc59116_led *led = work_to_led(work); ++ struct regmap *regmap = led->regmap; ++ int err; ++ u8 pwm; ++ ++ pwm = TLC59116_REG_PWM(led->led_no); ++ err = regmap_write(regmap, pwm, led->ldev.brightness); ++ if (err) ++ dev_err(led->ldev.dev, "Failed setting brightness\n"); ++} ++ ++static void ++tlc59116_led_set(struct led_classdev *led_cdev, enum led_brightness value) ++{ ++ struct tlc59116_led *led = ldev_to_led(led_cdev); ++ ++ led->ldev.brightness = value; ++ schedule_work(&led->work); ++} ++ ++static void ++tlc59116_destroy_devices(struct tlc59116_priv *priv, unsigned int i) ++{ ++ while (--i >= 0) { ++ if (priv->leds[i].active) { ++ led_classdev_unregister(&priv->leds[i].ldev); ++ cancel_work_sync(&priv->leds[i].work); ++ } ++ } ++} ++ ++static int ++tlc59116_configure(struct device *dev, ++ struct tlc59116_priv *priv, ++ struct regmap *regmap) ++{ ++ unsigned int i; ++ int err = 0; ++ ++ tlc59116_set_mode(regmap, MODE2_DIM); ++ for (i = 0; i < TLC59116_LEDS; i++) { ++ struct tlc59116_led *led = &priv->leds[i]; ++ ++ if (!led->active) ++ continue; ++ ++ led->regmap = regmap; ++ led->led_no = i; ++ led->ldev.brightness_set = tlc59116_led_set; ++ led->ldev.max_brightness = LED_FULL; ++ INIT_WORK(&led->work, tlc59116_led_work); ++ err = led_classdev_register(dev, &led->ldev); ++ if (err < 0) { ++ dev_err(dev, "couldn't register LED %s\n", ++ led->ldev.name); ++ goto exit; ++ } ++ tlc59116_set_led(led, TLC59116_DIM); ++ } ++ ++ return 0; ++ ++exit: ++ tlc59116_destroy_devices(priv, i); ++ return err; ++} ++ ++static const struct regmap_config tlc59116_regmap = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .max_register = 0x1e, ++}; ++ ++static int ++tlc59116_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct tlc59116_priv *priv = i2c_get_clientdata(client); ++ struct device *dev = &client->dev; ++ struct device_node *np = client->dev.of_node, *child; ++ struct regmap *regmap; ++ int err, count, reg; ++ ++ count = of_get_child_count(np); ++ if (!count || count > TLC59116_LEDS) ++ return -EINVAL; ++ ++ if (!i2c_check_functionality(client->adapter, ++ I2C_FUNC_SMBUS_BYTE_DATA)) ++ return -EIO; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ regmap = devm_regmap_init_i2c(client, &tlc59116_regmap); ++ if (IS_ERR(regmap)) { ++ err = PTR_ERR(regmap); ++ dev_err(dev, "Failed to allocate register map: %d\n", err); ++ return err; ++ } ++ ++ i2c_set_clientdata(client, priv); ++ ++ for_each_child_of_node(np, child) { ++ err = of_property_read_u32(child, "reg", ®); ++ if (err) ++ return err; ++ if (reg < 0 || reg >= TLC59116_LEDS) ++ return -EINVAL; ++ if (priv->leds[reg].active) ++ return -EINVAL; ++ priv->leds[reg].active = true; ++ priv->leds[reg].ldev.name = ++ of_get_property(child, "label", NULL) ? : child->name; ++ priv->leds[reg].ldev.default_trigger = ++ of_get_property(child, "linux,default-trigger", NULL); ++ } ++ return tlc59116_configure(dev, priv, regmap); ++} ++ ++static int ++tlc59116_remove(struct i2c_client *client) ++{ ++ struct tlc59116_priv *priv = i2c_get_clientdata(client); ++ ++ tlc59116_destroy_devices(priv, TLC59116_LEDS); ++ ++ return 0; ++} ++ ++static const struct of_device_id of_tlc59116_leds_match[] = { ++ { .compatible = "ti,tlc59116", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, of_tlc59116_leds_match); ++ ++static const struct i2c_device_id tlc59116_id[] = { ++ { "tlc59116" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(i2c, tlc59116_id); ++ ++static struct i2c_driver tlc59116_driver = { ++ .driver = { ++ .name = "tlc59116", ++ .of_match_table = of_match_ptr(of_tlc59116_leds_match), ++ }, ++ .probe = tlc59116_probe, ++ .remove = tlc59116_remove, ++ .id_table = tlc59116_id, ++}; ++ ++module_i2c_driver(tlc59116_driver); ++ ++MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("TLC59116 LED driver"); diff --git a/target/linux/mvebu/patches-4.0/100-find_active_root.patch b/target/linux/mvebu/patches-4.0/100-find_active_root.patch new file mode 100644 index 0000000..e32b608 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/100-find_active_root.patch @@ -0,0 +1,61 @@ +The WRT1900AC among other Linksys routers uses a dual-firmware layout. +Dynamically rename the active partition to "ubi". + +Signed-off-by: Imre Kaloz <kaloz@openwrt.org> + +--- a/drivers/mtd/ofpart.c ++++ b/drivers/mtd/ofpart.c +@@ -25,12 +25,15 @@ static bool node_has_compatible(struct d + return of_get_property(pp, "compatible", NULL); + } + ++static int mangled_rootblock; ++ + static int parse_ofpart_partitions(struct mtd_info *master, + struct mtd_partition **pparts, + struct mtd_part_parser_data *data) + { + struct device_node *node; + const char *partname; ++ const char *owrtpart = "ubi"; + struct device_node *pp; + int nr_parts, i; + +@@ -78,9 +81,15 @@ static int parse_ofpart_partitions(struc + (*pparts)[i].offset = of_read_number(reg, a_cells); + (*pparts)[i].size = of_read_number(reg + a_cells, s_cells); + +- partname = of_get_property(pp, "label", &len); +- if (!partname) +- partname = of_get_property(pp, "name", &len); ++ if (mangled_rootblock && (i == mangled_rootblock)) { ++ partname = owrtpart; ++ } else { ++ partname = of_get_property(pp, "label", &len); ++ ++ if (!partname) ++ partname = of_get_property(pp, "name", &len); ++ } ++ + (*pparts)[i].name = partname; + + if (of_get_property(pp, "read-only", &len)) +@@ -178,6 +187,18 @@ static int __init ofpart_parser_init(voi + return 0; + } + ++static int __init active_root(char *str) ++{ ++ get_option(&str, &mangled_rootblock); ++ ++ if (!mangled_rootblock) ++ return 1; ++ ++ return 1; ++} ++ ++__setup("mangled_rootblock=", active_root); ++ + static void __exit ofpart_parser_exit(void) + { + deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/mvebu/patches-4.0/102-revert_i2c_delay.patch b/target/linux/mvebu/patches-4.0/102-revert_i2c_delay.patch new file mode 100644 index 0000000..42ee3b4 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/102-revert_i2c_delay.patch @@ -0,0 +1,15 @@ +--- a/arch/arm/boot/dts/armada-xp.dtsi ++++ b/arch/arm/boot/dts/armada-xp.dtsi +@@ -88,12 +88,10 @@ + }; + + i2c0: i2c@11000 { +- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11000 0x100>; + }; + + i2c1: i2c@11100 { +- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11100 0x100>; + }; + diff --git a/target/linux/mvebu/patches-4.0/202-gpio_mvebu_add_limited_pwm_support.patch b/target/linux/mvebu/patches-4.0/202-gpio_mvebu_add_limited_pwm_support.patch new file mode 100644 index 0000000..f1b8688 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/202-gpio_mvebu_add_limited_pwm_support.patch @@ -0,0 +1,433 @@ +Armada 370/XP devices can 'blink' gpio lines with a configurable on +and off period. This can be modelled as a PWM. + +However, there are only two sets of PWM configuration registers for +all the gpio lines. This driver simply allows a single gpio line per +gpio chip of 32 lines to be used as a PWM. Attempts to use more return +EBUSY. + +Due to the interleaving of registers it is not simple to separate the +PWM driver from the gpio driver. Thus the gpio driver has been +extended with a PWM driver. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + drivers/gpio/Kconfig | 5 ++ + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-mvebu-pwm.c | 202 ++++++++++++++++++++++++++++++++++++++++++ + drivers/gpio/gpio-mvebu.c | 37 +++----- + drivers/gpio/gpio-mvebu.h | 79 +++++++++++++++++ + 5 files changed, 299 insertions(+), 25 deletions(-) + create mode 100644 drivers/gpio/gpio-mvebu-pwm.c + create mode 100644 drivers/gpio/gpio-mvebu.h + +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -246,6 +246,11 @@ config GPIO_MVEBU + select GPIO_GENERIC + select GENERIC_IRQ_CHIP + ++config GPIO_MVEBU_PWM ++ def_bool y ++ depends on GPIO_MVEBU ++ depends on PWM ++ + config GPIO_MXC + def_bool y + depends on ARCH_MXC +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -61,6 +61,7 @@ obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o + obj-$(CONFIG_GPIO_MSM_V1) += gpio-msm-v1.o + obj-$(CONFIG_GPIO_MSM_V2) += gpio-msm-v2.o + obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o ++obj-$(CONFIG_GPIO_MVEBU_PWM) += gpio-mvebu-pwm.o + obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o + obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o + obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o +--- /dev/null ++++ b/drivers/gpio/gpio-mvebu-pwm.c +@@ -0,0 +1,202 @@ ++#include <linux/err.h> ++#include <linux/module.h> ++#include <linux/gpio.h> ++#include <linux/pwm.h> ++#include <linux/clk.h> ++#include <linux/platform_device.h> ++#include "gpio-mvebu.h" ++#include "gpiolib.h" ++ ++static void __iomem *mvebu_gpioreg_blink_select(struct mvebu_gpio_chip *mvchip) ++{ ++ return mvchip->membase + GPIO_BLINK_CNT_SELECT; ++} ++ ++static inline struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip) ++{ ++ return container_of(chip, struct mvebu_pwm, chip); ++} ++ ++static inline struct mvebu_gpio_chip *to_mvchip(struct mvebu_pwm *pwm) ++{ ++ return container_of(pwm, struct mvebu_gpio_chip, pwm); ++} ++ ++static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwmd) ++{ ++ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); ++ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); ++ struct gpio_desc *desc = gpio_to_desc(pwmd->pwm); ++ unsigned long flags; ++ int ret = 0; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ if (pwm->used) { ++ ret = -EBUSY; ++ } else { ++ if (!desc) { ++ ret = -ENODEV; ++ goto out; ++ } ++ ret = gpiod_request(desc, "mvebu-pwm"); ++ if (ret) ++ goto out; ++ ++ ret = gpiod_direction_output(desc, 0); ++ if (ret) { ++ gpiod_free(desc); ++ goto out; ++ } ++ ++ pwm->pin = pwmd->pwm - mvchip->chip.base; ++ pwm->used = true; ++ } ++ ++out: ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return ret; ++} ++ ++static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwmd) ++{ ++ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); ++ struct gpio_desc *desc = gpio_to_desc(pwmd->pwm); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ gpiod_free(desc); ++ pwm->used = false; ++ spin_unlock_irqrestore(&pwm->lock, flags); ++} ++ ++static int mvebu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwmd, ++ int duty_ns, int period_ns) ++{ ++ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); ++ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); ++ unsigned int on, off; ++ unsigned long long val; ++ u32 u; ++ ++ val = (unsigned long long) pwm->clk_rate * duty_ns; ++ do_div(val, NSEC_PER_SEC); ++ if (val > UINT_MAX) ++ return -EINVAL; ++ if (val) ++ on = val; ++ else ++ on = 1; ++ ++ val = (unsigned long long) pwm->clk_rate * (period_ns - duty_ns); ++ do_div(val, NSEC_PER_SEC); ++ if (val > UINT_MAX) ++ return -EINVAL; ++ if (val) ++ off = val; ++ else ++ off = 1; ++ ++ u = readl_relaxed(mvebu_gpioreg_blink_select(mvchip)); ++ u &= ~(1 << pwm->pin); ++ u |= (pwm->id << pwm->pin); ++ writel_relaxed(u, mvebu_gpioreg_blink_select(mvchip)); ++ ++ writel_relaxed(on, pwm->membase + BLINK_ON_DURATION); ++ writel_relaxed(off, pwm->membase + BLINK_OFF_DURATION); ++ ++ return 0; ++} ++ ++static int mvebu_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwmd) ++{ ++ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); ++ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); ++ ++ mvebu_gpio_blink(&mvchip->chip, pwm->pin, 1); ++ ++ return 0; ++} ++ ++static void mvebu_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwmd) ++{ ++ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); ++ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); ++ ++ mvebu_gpio_blink(&mvchip->chip, pwm->pin, 0); ++} ++ ++static const struct pwm_ops mvebu_pwm_ops = { ++ .request = mvebu_pwm_request, ++ .free = mvebu_pwm_free, ++ .config = mvebu_pwm_config, ++ .enable = mvebu_pwm_enable, ++ .disable = mvebu_pwm_disable, ++ .owner = THIS_MODULE, ++}; ++ ++void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) ++{ ++ struct mvebu_pwm *pwm = &mvchip->pwm; ++ ++ pwm->blink_select = readl_relaxed(mvebu_gpioreg_blink_select(mvchip)); ++ pwm->blink_on_duration = ++ readl_relaxed(pwm->membase + BLINK_ON_DURATION); ++ pwm->blink_off_duration = ++ readl_relaxed(pwm->membase + BLINK_OFF_DURATION); ++} ++ ++void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) ++{ ++ struct mvebu_pwm *pwm = &mvchip->pwm; ++ ++ writel_relaxed(pwm->blink_select, mvebu_gpioreg_blink_select(mvchip)); ++ writel_relaxed(pwm->blink_on_duration, ++ pwm->membase + BLINK_ON_DURATION); ++ writel_relaxed(pwm->blink_off_duration, ++ pwm->membase + BLINK_OFF_DURATION); ++} ++ ++/* ++ * Armada 370/XP has simple PWM support for gpio lines. Other SoCs ++ * don't have this hardware. So if we don't have the necessary ++ * resource, it is not an error. ++ */ ++int mvebu_pwm_probe(struct platform_device *pdev, ++ struct mvebu_gpio_chip *mvchip, ++ int id) ++{ ++ struct device *dev = &pdev->dev; ++ struct mvebu_pwm *pwm = &mvchip->pwm; ++ struct resource *res; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"); ++ if (!res) ++ return 0; ++ ++ mvchip->pwm.membase = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mvchip->pwm.membase)) ++ return PTR_ERR(mvchip->percpu_membase); ++ ++ if (id < 0 || id > 1) ++ return -EINVAL; ++ pwm->id = id; ++ ++ if (IS_ERR(mvchip->clk)) ++ return PTR_ERR(mvchip->clk); ++ ++ pwm->clk_rate = clk_get_rate(mvchip->clk); ++ if (!pwm->clk_rate) { ++ dev_err(dev, "failed to get clock rate\n"); ++ return -EINVAL; ++ } ++ ++ pwm->chip.dev = dev; ++ pwm->chip.ops = &mvebu_pwm_ops; ++ pwm->chip.base = mvchip->chip.base; ++ pwm->chip.npwm = mvchip->chip.ngpio; ++ pwm->chip.can_sleep = false; ++ ++ spin_lock_init(&pwm->lock); ++ ++ return pwmchip_add(&pwm->chip); ++} +--- a/drivers/gpio/gpio-mvebu.c ++++ b/drivers/gpio/gpio-mvebu.c +@@ -42,10 +42,11 @@ + #include <linux/io.h> + #include <linux/of_irq.h> + #include <linux/of_device.h> ++#include <linux/pwm.h> + #include <linux/clk.h> + #include <linux/pinctrl/consumer.h> + #include <linux/irqchip/chained_irq.h> +- ++#include "gpio-mvebu.h" + /* + * GPIO unit register offsets. + */ +@@ -75,24 +76,6 @@ + + #define MVEBU_MAX_GPIO_PER_BANK 32 + +-struct mvebu_gpio_chip { +- struct gpio_chip chip; +- spinlock_t lock; +- void __iomem *membase; +- void __iomem *percpu_membase; +- int irqbase; +- struct irq_domain *domain; +- int soc_variant; +- +- /* Used to preserve GPIO registers across suspend/resume */ +- u32 out_reg; +- u32 io_conf_reg; +- u32 blink_en_reg; +- u32 in_pol_reg; +- u32 edge_mask_regs[4]; +- u32 level_mask_regs[4]; +-}; +- + /* + * Functions returning addresses of individual registers for a given + * GPIO controller. +@@ -228,7 +211,7 @@ static int mvebu_gpio_get(struct gpio_ch + return (u >> pin) & 1; + } + +-static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) ++void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) + { + struct mvebu_gpio_chip *mvchip = + container_of(chip, struct mvebu_gpio_chip, chip); +@@ -617,6 +600,8 @@ static int mvebu_gpio_suspend(struct pla + BUG(); + } + ++ mvebu_pwm_suspend(mvchip); ++ + return 0; + } + +@@ -660,6 +645,8 @@ static int mvebu_gpio_resume(struct plat + BUG(); + } + ++ mvebu_pwm_resume(mvchip); ++ + return 0; + } + +@@ -671,7 +658,6 @@ static int mvebu_gpio_probe(struct platf + struct resource *res; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; +- struct clk *clk; + unsigned int ngpios; + int soc_variant; + int i, cpu, id; +@@ -701,10 +687,10 @@ static int mvebu_gpio_probe(struct platf + return id; + } + +- clk = devm_clk_get(&pdev->dev, NULL); ++ mvchip->clk = devm_clk_get(&pdev->dev, NULL); + /* Not all SoCs require a clock.*/ +- if (!IS_ERR(clk)) +- clk_prepare_enable(clk); ++ if (!IS_ERR(mvchip->clk)) ++ clk_prepare_enable(mvchip->clk); + + mvchip->soc_variant = soc_variant; + mvchip->chip.label = dev_name(&pdev->dev); +@@ -838,7 +824,8 @@ static int mvebu_gpio_probe(struct platf + goto err_generic_chip; + } + +- return 0; ++ /* Armada 370/XP has simple PWM support for gpio lines */ ++ return mvebu_pwm_probe(pdev, mvchip, id); + + err_generic_chip: + irq_remove_generic_chip(gc, IRQ_MSK(ngpios), IRQ_NOREQUEST, +--- /dev/null ++++ b/drivers/gpio/gpio-mvebu.h +@@ -0,0 +1,79 @@ ++/* ++ * Interface between MVEBU GPIO driver and PWM driver for GPIO pins ++ * ++ * Copyright (C) 2015, Andrew Lunn <andrew@lunn.ch> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef MVEBU_GPIO_PWM_H ++#define MVEBU_GPIO_PWM_H ++ ++#define BLINK_ON_DURATION 0x0 ++#define BLINK_OFF_DURATION 0x4 ++#define GPIO_BLINK_CNT_SELECT 0x0020 ++ ++struct mvebu_pwm { ++ void __iomem *membase; ++ unsigned long clk_rate; ++ bool used; ++ unsigned pin; ++ struct pwm_chip chip; ++ int id; ++ spinlock_t lock; ++ ++ /* Used to preserve GPIO/PWM registers across suspend / ++ * resume */ ++ u32 blink_select; ++ u32 blink_on_duration; ++ u32 blink_off_duration; ++}; ++ ++struct mvebu_gpio_chip { ++ struct gpio_chip chip; ++ spinlock_t lock; ++ void __iomem *membase; ++ void __iomem *percpu_membase; ++ int irqbase; ++ struct irq_domain *domain; ++ int soc_variant; ++ struct clk *clk; ++#ifdef CONFIG_PWM ++ struct mvebu_pwm pwm; ++#endif ++ /* Used to preserve GPIO registers across suspend/resume */ ++ u32 out_reg; ++ u32 io_conf_reg; ++ u32 blink_en_reg; ++ u32 in_pol_reg; ++ u32 edge_mask_regs[4]; ++ u32 level_mask_regs[4]; ++}; ++ ++void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value); ++ ++#ifdef CONFIG_PWM ++int mvebu_pwm_probe(struct platform_device *pdev, ++ struct mvebu_gpio_chip *mvchip, ++ int id); ++void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip); ++void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip); ++#else ++int mvebu_pwm_probe(struct platform_device *pdev, ++ struct mvebu_gpio_chip *mvchip, ++ int id) ++{ ++ return 0; ++} ++ ++void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) ++{ ++} ++ ++void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) ++{ ++} ++#endif ++#endif diff --git a/target/linux/mvebu/patches-4.0/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch b/target/linux/mvebu/patches-4.0/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch new file mode 100644 index 0000000..48f9394 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch @@ -0,0 +1,52 @@ +Document the optional parameters needed for PWM operation of gpio +lines. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 ++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt ++++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +@@ -38,6 +38,23 @@ Required properties: + - #gpio-cells: Should be two. The first cell is the pin number. The + second cell is reserved for flags, unused at the moment. + ++Optional properties: ++ ++In order to use the gpio lines in PWM mode, some additional optional ++properties are required. Only Armada 370 and XP supports these ++properties. ++ ++- reg: an additional register set is needed, for the GPIO Blink ++ Counter on/off registers. ++ ++- reg-names: Must contain an entry "pwm" corresponding to the ++ additional register range needed for pwm operation. ++ ++- #pwm-cells: Should be two. The first cell is the pin number. The ++ second cell is reserved for flags, unused at the moment. ++ ++- clocks: Must be a phandle to the clock for the gpio controller. ++ + Example: + + gpio0: gpio@d0018100 { +@@ -51,3 +68,17 @@ Example: + #interrupt-cells = <2>; + interrupts = <16>, <17>, <18>, <19>; + }; ++ ++ gpio1: gpio@18140 { ++ compatible = "marvell,orion-gpio"; ++ reg = <0x18140 0x40>, <0x181c8 0x08>; ++ reg-names = "gpio", "pwm"; ++ ngpios = <17>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #pwm-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ interrupts = <87>, <88>, <89>; ++ clocks = <&coreclk 0>; ++ }; diff --git a/target/linux/mvebu/patches-4.0/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch b/target/linux/mvebu/patches-4.0/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch new file mode 100644 index 0000000..dff29dc --- /dev/null +++ b/target/linux/mvebu/patches-4.0/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch @@ -0,0 +1,149 @@ +Add properties to the gpio nodes to allow them to be also used +as pwm lines. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- + arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- + arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- + arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- + 4 files changed, 30 insertions(+), 8 deletions(-) + +--- a/arch/arm/boot/dts/armada-370.dtsi ++++ b/arch/arm/boot/dts/armada-370.dtsi +@@ -157,24 +157,30 @@ + + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; +- reg = <0x18100 0x40>; ++ reg = <0x18100 0x40>, <0x181c0 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; ++ clocks = <&coreclk 0>; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; +- reg = <0x18140 0x40>; ++ reg = <0x18140 0x40>, <0x181c8 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>, <90>; ++ clocks = <&coreclk 0>; + }; + + gpio2: gpio@18180 { +--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi ++++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi +@@ -203,24 +203,30 @@ + internal-regs { + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; +- reg = <0x18100 0x40>; ++ reg = <0x18100 0x40>, <0x181c0 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; ++ clocks = <&coreclk 0>; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; +- reg = <0x18140 0x40>; ++ reg = <0x18140 0x40>, <0x181c8 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <17>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>; ++ clocks = <&coreclk 0>; + }; + }; + }; +--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi ++++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi +@@ -287,24 +287,28 @@ + internal-regs { + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; +- reg = <0x18100 0x40>; ++ reg = <0x18100 0x40>, <0x181c0 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; ++ clocks = <&coreclk 0>; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; +- reg = <0x18140 0x40>; ++ reg = <0x18140 0x40>, <0x181c8 0x08>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>, <90>; ++ clocks = <&coreclk 0>; + }; + + gpio2: gpio@18180 { +--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi ++++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi +@@ -325,24 +325,30 @@ + internal-regs { + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; +- reg = <0x18100 0x40>; ++ reg = <0x18100 0x40>, <0x181c0 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; ++ clocks = <&coreclk 0>; + }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; +- reg = <0x18140 0x40>; ++ reg = <0x18140 0x40>, <0x181c8 0x08>; ++ reg-names = "gpio", "pwm"; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; ++ #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>, <90>; ++ clocks = <&coreclk 0>; + }; + + gpio2: gpio@18180 { diff --git a/target/linux/mvebu/patches-4.0/205-arm_mvebu_enable_pwm_in_defconfig.patch b/target/linux/mvebu/patches-4.0/205-arm_mvebu_enable_pwm_in_defconfig.patch new file mode 100644 index 0000000..4b52ac2 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/205-arm_mvebu_enable_pwm_in_defconfig.patch @@ -0,0 +1,18 @@ +Now that the gpio driver also supports PWM operation, enable +the PWM framework in mvebu_v7_defconfig. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + arch/arm/configs/mvebu_v7_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/configs/mvebu_v7_defconfig ++++ b/arch/arm/configs/mvebu_v7_defconfig +@@ -118,6 +118,7 @@ CONFIG_DMADEVICES=y + CONFIG_MV_XOR=y + # CONFIG_IOMMU_SUPPORT is not set + CONFIG_MEMORY=y ++CONFIG_PWM=y + CONFIG_EXT4_FS=y + CONFIG_ISO9660_FS=y + CONFIG_JOLIET=y diff --git a/target/linux/mvebu/patches-4.0/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch b/target/linux/mvebu/patches-4.0/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch new file mode 100644 index 0000000..dddd67a --- /dev/null +++ b/target/linux/mvebu/patches-4.0/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch @@ -0,0 +1,28 @@ +The mvebu gpio driver can also perform PWM on some pins. Us the +pwm-fan driver to control the fan of the WRT1900AC, giving us fine +grain control over its speed and hence noise. + +Signed-off-by: Andrew Lunn <andrew@lunn.ch> +--- + arch/arm/boot/dts/armada-xp-wrt1900ac.dts | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -407,13 +407,11 @@ + }; + }; + +- gpio_fan { ++ pwm_fan { + /* SUNON HA4010V4-0000-C99 */ +- compatible = "gpio-fan"; +- gpios = <&gpio0 24 0>; + +- gpio-fan,speed-map = <0 0 +- 4500 1>; ++ compatible = "pwm-fan"; ++ pwms = <&gpio0 24 4000 0>; + }; + + mvsw61xx { diff --git a/target/linux/mvebu/patches-4.0/207-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-4.0/207-armada-385-rd-mtd-partitions.patch new file mode 100644 index 0000000..51408dd --- /dev/null +++ b/target/linux/mvebu/patches-4.0/207-armada-385-rd-mtd-partitions.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/boot/dts/armada-388-rd.dts ++++ b/arch/arm/boot/dts/armada-388-rd.dts +@@ -77,6 +77,16 @@ + compatible = "st,m25p128"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0 0x400000>; ++ }; ++ ++ partition@1 { ++ label = "firmware"; ++ reg = <0x400000 0xc00000>; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-4.0/208-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-4.0/208-ARM-mvebu-385-ap-Add-partitions.patch new file mode 100644 index 0000000..2845181 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/208-ARM-mvebu-385-ap-Add-partitions.patch @@ -0,0 +1,34 @@ +From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@free-electrons.com> +Date: Tue, 13 Jan 2015 11:14:09 +0100 +Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions + +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +--- + arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/arm/boot/dts/armada-385-db-ap.dts ++++ b/arch/arm/boot/dts/armada-385-db-ap.dts +@@ -162,6 +162,21 @@ + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; ++ ++ mtd0@00000000 { ++ label = "u-boot"; ++ reg = <0x00000000 0x00800000>; ++ }; ++ ++ mtd1@00800000 { ++ label = "kernel"; ++ reg = <0x00800000 0x00800000>; ++ }; ++ ++ mtd2@01000000 { ++ label = "ubi"; ++ reg = <0x01000000 0x3f000000>; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-4.0/300-add_missing_labels.patch b/target/linux/mvebu/patches-4.0/300-add_missing_labels.patch new file mode 100644 index 0000000..a34f689 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/300-add_missing_labels.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/boot/dts/armada-38x.dtsi ++++ b/arch/arm/boot/dts/armada-38x.dtsi +@@ -491,7 +491,7 @@ + status = "disabled"; + }; + +- mdio@72004 { ++ mdio: mdio@72004 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,orion-mdio"; diff --git a/target/linux/mvebu/patches-4.0/700-usb_xhci_plat_phy_support.patch b/target/linux/mvebu/patches-4.0/700-usb_xhci_plat_phy_support.patch new file mode 100644 index 0000000..a315b87 --- /dev/null +++ b/target/linux/mvebu/patches-4.0/700-usb_xhci_plat_phy_support.patch @@ -0,0 +1,47 @@ +--- a/drivers/usb/host/xhci-plat.c ++++ b/drivers/usb/host/xhci-plat.c +@@ -16,6 +16,7 @@ + #include <linux/module.h> + #include <linux/of.h> + #include <linux/platform_device.h> ++#include <linux/usb/phy.h> + #include <linux/slab.h> + #include <linux/usb/xhci_pdriver.h> + +@@ -155,12 +156,27 @@ static int xhci_plat_probe(struct platfo + if (HCC_MAX_PSA(xhci->hcc_params) >= 4) + xhci->shared_hcd->can_do_streams = 1; + ++ hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); ++ if (IS_ERR(hcd->usb_phy)) { ++ ret = PTR_ERR(hcd->usb_phy); ++ if (ret == -EPROBE_DEFER) ++ goto put_usb3_hcd; ++ hcd->usb_phy = NULL; ++ } else { ++ ret = usb_phy_init(hcd->usb_phy); ++ if (ret) ++ goto put_usb3_hcd; ++ } ++ + ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED); + if (ret) +- goto put_usb3_hcd; ++ goto disable_usb_phy; + + return 0; + ++disable_usb_phy: ++ usb_phy_shutdown(hcd->usb_phy); ++ + put_usb3_hcd: + usb_put_hcd(xhci->shared_hcd); + +@@ -184,6 +200,7 @@ static int xhci_plat_remove(struct platf + struct clk *clk = xhci->clk; + + usb_remove_hcd(xhci->shared_hcd); ++ usb_phy_shutdown(hcd->usb_phy); + usb_put_hcd(xhci->shared_hcd); + + usb_remove_hcd(hcd); |