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-rw-r--r--spdif_decoder.vhd52
1 files changed, 26 insertions, 26 deletions
diff --git a/spdif_decoder.vhd b/spdif_decoder.vhd
index a8e9d94..c16a6f5 100644
--- a/spdif_decoder.vhd
+++ b/spdif_decoder.vhd
@@ -14,24 +14,24 @@ entity spdif_decoder is
);
-port (
- n_reset:in std_logic;
- spdif:in std_logic;
- clk:in std_logic;
-
- bmc_ready: out std_logic;
- bmc_e: out std_logic;
- bmc_l: out std_logic;
- bmc_d : out std_logic;
-
- d : out std_logic_vector(26 downto 0);
- ready: out std_logic;
- sof: out std_logic;
- bna: out std_logic;
- sos: out std_logic
-);
+ port (
+ n_reset : in std_logic;
+ spdif : in std_logic;
+ clk : in std_logic;
+
+ bmc_ready : out std_logic;
+ bmc_e : out std_logic;
+ bmc_l : out std_logic;
+ bmc_d : out std_logic;
+
+ d : out std_logic_vector(26 downto 0);
+ ready : out std_logic;
+ sof : out std_logic;
+ bna : out std_logic;
+ sos : out std_logic
+ );
end spdif_decoder;
-
+
architecture rtl of spdif_decoder is
@@ -100,7 +100,7 @@ begin
end process;
- parity_valid<= not xor_reduce(d_sr(31 downto 4));
+ parity_valid <= not xor_reduce(d_sr(31 downto 4));
process (clk, b_ready, e_sr, l_sr, d_sr, parity_valid, n_reset)
begin
@@ -114,30 +114,30 @@ begin
if (d_sr(3 downto 1) = "010") and (l_sr(3 downto 1) = "101") then --B code
d_buf <= d_sr(29 downto 3);
sof_buf <= '1';
- sos_buf <='1';
+ sos_buf <= '1';
bna_buf <= '0';
ready_buf <= '1';
elsif (d_sr(3 downto 1) = "100") and (l_sr(3 downto 1) = "011") then --M code
d_buf <= d_sr(29 downto 3);
sof_buf <= '0';
- sos_buf <='1';
+ sos_buf <= '1';
bna_buf <= '0';
ready_buf <= '1';
elsif (d_sr(3 downto 0) = "0100") and (l_sr(3 downto 0) = "0001") then --W code
d_buf <= d_sr(30 downto 4);
sof_buf <= '0';
- sos_buf <='0';
+ sos_buf <= '0';
bna_buf <= '1';
ready_buf <= '1';
else
- sof_buf <= '0';
- sos_buf <='0';
- bna_buf <= '1';
- ready_buf <= '0';
+ sof_buf <= '0';
+ sos_buf <= '0';
+ bna_buf <= '1';
+ ready_buf <= '0';
end if;
else
sof_buf <= '0';
- sos_buf <='0';
+ sos_buf <= '0';
bna_buf <= '1';
ready_buf <= '0';
end if;