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Diffstat (limited to 'spdif.sdc')
| -rw-r--r-- | spdif.sdc | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/spdif.sdc b/spdif.sdc new file mode 100644 index 0000000..f74ef07 --- /dev/null +++ b/spdif.sdc @@ -0,0 +1,15 @@ +# +# Design Timing Constraints Definitions +# + +set_time_format -unit ns -decimal_places 3 + +############################################################################## +# Create Input reference clocks +create_clock -name {xtal_50mhz} -period 20.000 -waveform { 0.000 10.000 } [get_ports { xtal_50mhz }] + +############################################################################## +# Now that we have created the custom clocks which will be base clocks, +# derive_pll_clock is used to calculate all remaining clocks for PLLs +derive_pll_clocks -create_base_clocks +derive_clock_uncertainty
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