diff options
Diffstat (limited to 'spdif.qsf')
| -rw-r--r-- | spdif.qsf | 21 |
1 files changed, 13 insertions, 8 deletions
@@ -28,8 +28,6 @@ set_location_assignment PIN_73 -to n_rst_in set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to spdif_in set_location_assignment PIN_112 -to n_mute_out set_location_assignment PIN_114 -to n_stby_out -set_location_assignment PIN_41 -to dbg1 -set_location_assignment PIN_101 -to dbg2 set_global_assignment -name VHDL_FILE ccd.vhd set_global_assignment -name VHDL_FILE counter.vhd set_global_assignment -name VHDL_FILE dflipflop.vhd @@ -39,15 +37,22 @@ set_global_assignment -name VHDL_FILE spdif.vhd set_global_assignment -name VHDL_FILE bmc_decoder.vhd set_global_assignment -name VHDL_FILE spdif_decoder.vhd set_global_assignment -name VHDL_FILE silence_detector.vhd +set_global_assignment -name VHDL_FILE detector.vhd +set_global_assignment -name VHDL_FILE divider.vhd set_global_assignment -name SOURCE_FILE db/spdif.cmp.rdb set_global_assignment -name SDC_FILE spdif.sdc -set_location_assignment PIN_103 -to dbg3 -set_location_assignment PIN_104 -to dbg4 -set_location_assignment PIN_113 -to dbg5 -set_location_assignment PIN_115 -to dbg6 -set_location_assignment PIN_118 -to dbg7 -set_location_assignment PIN_119 -to dbg8 +set_location_assignment PIN_41 -to dbg[0] +set_location_assignment PIN_101 -to dbg[1] +set_location_assignment PIN_103 -to dbg[2] +set_location_assignment PIN_104 -to dbg[3] +set_location_assignment PIN_113 -to dbg[4] +set_location_assignment PIN_115 -to dbg[5] +set_location_assignment PIN_118 -to dbg[6] +set_location_assignment PIN_119 -to dbg[7] set_global_assignment -name USE_CONFIGURATION_DEVICE ON set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND" + +set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)" +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation |