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diff --git a/cpld/laser.qsf b/cpld/laser.qsf
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+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2012 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 32-bit
+# Version 12.0 Build 178 05/31/2012 SJ Web Edition
+# Date created = 21:48:38  September 12, 2013
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+#		laser.qdf
+#    If this file doesn't exist, see file:
+#		assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+#    file is updated automatically by the Quartus II software
+#    and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY "MAX II"
+set_global_assignment -name DEVICE EPM240T100C5
+set_global_assignment -name TOP_LEVEL_ENTITY laser
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 12.0
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:48:38  SEPTEMBER 12, 2013"
+set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
+
+
+# board assignments
+
+set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to n_por
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to laser
+
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to dbg[7]
+
+
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
+
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
+
+set_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS ON
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+
+#set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP"
+set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND"
+
+set_global_assignment -name NUM_PARALLEL_PROCESSORS 1
+
+set_global_assignment -name POWER_USE_TA_VALUE 35
+
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (Verilog)"
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+
+#yellow (2.83Mhz)
+set_location_assignment PIN_12 -to iis_sclk	
+
+#orange (11Mhz)
+set_location_assignment PIN_15 -to iis_mclk
+
+#red 
+set_location_assignment PIN_17 -to iis_sdin
+
+#brown (44.1kHz)
+set_location_assignment PIN_19 -to iis_lrclk
+
+set_location_assignment PIN_27 -to laser_out
+
+set_location_assignment PIN_37 -to diff0_minus
+set_location_assignment PIN_39 -to diff0_plus
+
+set_location_assignment PIN_44 -to n_por
+
+
+set_location_assignment PIN_62 -to test_clk;
+
+set_location_assignment PIN_64 -to clk_50mhz
+
+
+set_location_assignment PIN_74 -to dbg[0]
+set_location_assignment PIN_76 -to dbg[1]
+set_location_assignment PIN_78 -to dbg[2]
+set_location_assignment PIN_82 -to dbg[3]
+set_location_assignment PIN_84 -to dbg[4]
+set_location_assignment PIN_86 -to dbg[5]
+set_location_assignment PIN_88 -to dbg[6]
+set_location_assignment PIN_90 -to dbg[7]
+
+#set_location_assignment PIN_88 -to diff1_plus
+#set_location_assignment PIN_90 -to diff1_minus
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name SOURCE_FILE laser.cof
+set_global_assignment -name PIN_FILE laser.pin
+set_global_assignment -name VHDL_FILE laser.vhd
+