Commit message (Expand) | Author | Age | Files | Lines | ||
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| | | | * | sv: Switch parser to glr, prep for typedef | David Shah | 2019-10-03 | 1 | -0/+22 | |
| | | * | | Revert "Add test that is expecting to fail" | Eddie Hung | 2019-10-08 | 1 | -20/+0 | |
| | | * | | Merge pull request #1432 from YosysHQ/eddie/fix1427 | Eddie Hung | 2019-10-08 | 2 | -2/+60 | |
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| | | | * | | Use `sat -tempinduct` and comments for why equiv_opt not sufficient | Eddie Hung | 2019-10-03 | 1 | -1/+8 | |
| | | | * | | Fix broken CI, check reset even for constants, trim rstmux | Eddie Hung | 2019-10-02 | 1 | -2/+2 | |
| | | | * | | Fix test | Eddie Hung | 2019-10-02 | 1 | -2/+12 | |
| | | | * | | Merge branch 'eddie/fix_sat_init' into eddie/fix1427 | Eddie Hung | 2019-10-02 | 1 | -0/+20 | |
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| | | | | * | | Add test that is expecting to fail | Eddie Hung | 2019-10-02 | 1 | -0/+20 | |
| | | | * | | | Update test | Eddie Hung | 2019-10-02 | 1 | -13/+3 | |
| | | | * | | | Add test | Eddie Hung | 2019-10-02 | 1 | -0/+31 | |
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| | | * | | | Merge pull request #1433 from YosysHQ/eddie/equiv_opt_async2sync | Eddie Hung | 2019-10-08 | 2 | -9/+4 | |
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| | | | * | | | Disable equiv check for ice40 latches | Eddie Hung | 2019-10-03 | 1 | -6/+3 | |
| | | | * | | | Use equiv_opt -async2sync for xilinx | Eddie Hung | 2019-10-03 | 1 | -3/+1 | |
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| | | * | | | Missing 'accept' at end of ice40_wrapcarry, spotted by @cliffordwolf | Eddie Hung | 2019-10-05 | 1 | -0/+22 | |
| | * | | | | hierarchy - proc reorder | Miodrag Milanovic | 2019-10-18 | 9 | -14/+18 | |
| | * | | | | Check latches type one by one | Miodrag Milanovic | 2019-10-04 | 2 | -40/+25 | |
| | * | | | | Removed top module where not needed | Miodrag Milanovic | 2019-10-04 | 4 | -37/+4 | |
| | * | | | | Test muxes synth one by one | Miodrag Milanovic | 2019-10-04 | 2 | -38/+39 | |
| | * | | | | Cleaned verilog code from not used defines | Miodrag Milanovic | 2019-10-04 | 1 | -6/+0 | |
| | * | | | | Check for MULT18X18D, since that is working now | Miodrag Milanovic | 2019-10-04 | 2 | -14/+11 | |
| | * | | | | Check flops one by one | Miodrag Milanovic | 2019-10-04 | 4 | -71/+50 | |
| | * | | | | Removed alu and div_mod tests as agreed | Miodrag Milanovic | 2019-10-04 | 4 | -57/+0 | |
| | * | | | | equiv_opt with -assert | Eddie Hung | 2019-09-30 | 1 | -3/+1 | |
| | * | | | | Update resource count for alu.ys | Eddie Hung | 2019-09-30 | 1 | -3/+3 | |
| | * | | | | Move $x to end as per 7f0eec8 | Eddie Hung | 2019-09-30 | 1 | -1/+1 | |
| | * | | | | Update fsm.ys resource count | Eddie Hung | 2019-09-30 | 1 | -3/+3 | |
| | * | | | | Merge branch 'SergeyDegtyar/ecp5' of https://github.com/SergeyDegtyar/yosys i... | Eddie Hung | 2019-09-30 | 36 | -0/+800 | |
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| | | * | | | Add comment to dpram test about related issue. | SergeyDegtyar | 2019-09-18 | 1 | -0/+1 | |
| | | * | | | adffs test update (equiv_opt -multiclock). div_mod test fix | SergeyDegtyar | 2019-09-17 | 3 | -17/+12 | |
| | | * | | | Remove stat command form shifter.ys test | SergeyDegtyar | 2019-09-04 | 1 | -1/+1 | |
| | | * | | | Fix ecp5 tests | SergeyDegtyar | 2019-09-04 | 11 | -2421/+26 | |
| | | * | | | Uncomment sat command in memory.ys test. | SergeyDegtyar | 2019-09-03 | 1 | -2/+1 | |
| | | * | | | Add tests for ECP5 architecture | SergeyDegtyar | 2019-09-03 | 39 | -0/+3200 | |
| * | | | | | hierarchy - proc reorder | Miodrag Milanovic | 2019-10-18 | 4 | -9/+10 | |
| * | | | | | Cleanup and formating | Miodrag Milanovic | 2019-10-04 | 4 | -2/+4 | |
| * | | | | | split latches into separate checks | Miodrag Milanovic | 2019-10-04 | 2 | -41/+24 | |
| * | | | | | check muxes per type | Miodrag Milanovic | 2019-10-04 | 2 | -42/+37 | |
| * | | | | | check ff's separately | Miodrag Milanovic | 2019-10-04 | 2 | -26/+14 | |
| * | | | | | Cleanup top modules and not used defines | Miodrag Milanovic | 2019-10-04 | 5 | -44/+5 | |
| * | | | | | remove alu test | Miodrag Milanovic | 2019-10-04 | 2 | -36/+0 | |
| * | | | | | Merge branch 'SergeyDegtyar/anlogic' of https://github.com/SergeyDegtyar/yosy... | Miodrag Milanovic | 2019-10-04 | 22 | -0/+535 | |
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| | * | | | | Merge branch 'master' into SergeyDegtyar/anlogic | Sergey | 2019-10-01 | 34 | -55/+1053 | |
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| | * | | | | run-test.sh Move $x at end of line. | Sergey | 2019-10-01 | 1 | -1/+1 | |
| | * | | | | Add new tests for Anlogic architecture | SergeyDegtyar | 2019-09-23 | 22 | -0/+535 | |
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* | | | | | hierarchy - proc reorder | Miodrag Milanovic | 2019-10-18 | 6 | -13/+15 | |
* | | | | | Split mux tests per type | Miodrag Milanovic | 2019-10-04 | 2 | -38/+36 | |
* | | | | | Split latch check | Miodrag Milanovic | 2019-10-04 | 2 | -45/+24 | |
* | | | | | split rest od ff's | Miodrag Milanovic | 2019-10-04 | 3 | -30/+17 | |
* | | | | | Separate check for ff's types | Miodrag Milanovic | 2019-10-04 | 2 | -47/+48 | |
* | | | | | Cleaned tests | Miodrag Milanovic | 2019-10-04 | 5 | -49/+4 |