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* Updaye pmux2shiftx testClifford Wolf2019-04-221-2/+2
* Merge pull request #909 from zachjs/masterClifford Wolf2019-04-222-0/+48
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| * support repeat loops with constant repeat counts outside of constant functionsZachary Snow2019-04-092-0/+48
* | Merge pull request #944 from YosysHQ/clifford/pmux2shiftxClifford Wolf2019-04-222-0/+62
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| * | Improve "pmux2shiftx"Clifford Wolf2019-04-201-1/+1
| * | Improvements in "pmux2shiftx"Clifford Wolf2019-04-201-1/+1
| * | Improvements in pmux2shiftxClifford Wolf2019-04-202-20/+30
| * | Add test for pmux2shiftxClifford Wolf2019-04-202-0/+52
* | | Fix testsClifford Wolf2019-04-212-2/+3
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* | Add tests/aiger/.gitignoreClifford Wolf2019-04-191-0/+2
* | Add retime testEddie Hung2019-04-051-0/+6
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* Liberty file parser now accepts superfluous ;Niels Moseley2019-03-271-1/+1
* Liberty file parser now accepts superfluous ;Niels Moseley2019-03-273-2/+97
* Fix "verific -extnets" for more complex situationsClifford Wolf2019-03-261-0/+22
* Updated the liberty parser to accept [A:B] ranges (AST has not been updated)....Niels Moseley2019-03-246-0/+541
* Merge https://github.com/YosysHQ/yosys into read_aigerEddie Hung2019-03-1911-31/+175
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| * fix local name resolution in prefix constructsZachary Snow2019-03-181-0/+56
| * Fix handling of task output ports in clocked always blocks, fixes #857Clifford Wolf2019-03-071-0/+19
| * Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v failsJim Lawson2019-03-041-0/+1
| * Hotfix for "make test"Clifford Wolf2019-02-281-1/+1
| * Add "write_verilog -siminit"Clifford Wolf2019-02-281-1/+1
| * Fix FIRRTL to Verilog process instance subfield assignment.Jim Lawson2019-02-253-3/+1
| * Merge pull request #812 from ucb-bar/arrayhierarchyfixesClifford Wolf2019-02-242-1/+68
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| | * Address requested changes - don't require non-$ name.Jim Lawson2019-02-222-4/+7
| | * Fix normal (non-array) hierarchy -auto-top.Jim Lawson2019-02-192-1/+65
| * | Merge pull request #824 from litghost/fix_reduce_on_ffClifford Wolf2019-02-242-0/+24
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| | * | Fix WREDUCE on FF not fixing ARST_VALUE parameter.Keith Rothman2019-02-222-0/+24
| * | | Fix handling of defparam for when default_nettype is noneClifford Wolf2019-02-241-0/+2
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| * | Revert "Add -B option to autotest.sh to append to backend_opts"Eddie Hung2019-02-211-4/+2
| * | Remove simple_defparam testsEddie Hung2019-02-201-21/+0
| * | Merge https://github.com/YosysHQ/yosys into dff_initEddie Hung2019-02-175-8/+93
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* | | | One more merge conflictEddie Hung2019-02-171-6/+1
* | | | Merge https://github.com/YosysHQ/yosys into read_aigerEddie Hung2019-02-175-8/+97
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| * | | Append (instead of over-writing) EXTRA_FLAGSJim Lawson2019-02-151-1/+1
| * | | Update cells supported for verilog to FIRRTL conversion.Jim Lawson2019-02-154-7/+92
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* | | Support and differentiate between ASCII and binary AIG testingEddie Hung2019-02-082-2/+6
* | | Add binary AIGs converted from AAGEddie Hung2019-02-0814-0/+51
* | | Merge branch 'dff_init' of https://github.com/eddiehung/yosys into xaigEddie Hung2019-02-063-2/+67
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| * | Add tests for simple cases using defparamEddie Hung2019-02-061-0/+21
| * | Add -B option to autotest.sh to append to backend_optsEddie Hung2019-02-061-2/+4
| * | Extend testcaseEddie Hung2019-02-061-2/+34
| * | Add testcaseEddie Hung2019-02-061-0/+10
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* | Revert most of autotest.sh; for non *.v use Yosys to translateEddie Hung2019-02-061-7/+9
* | Rename ASCII testsEddie Hung2019-02-0615-0/+0
* | Add testsEddie Hung2019-02-0416-8/+109
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* Remove asicworld tests for (unsupported) switch-level modellingClifford Wolf2019-01-274-69/+0
* Merge pull request #770 from whitequark/opt_expr_cmpClifford Wolf2019-01-022-0/+44
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| * opt_expr: improve simplification of comparisons with large constants.whitequark2019-01-021-0/+18
| * opt_expr: refactor simplification of unsigned X<onehot and X>=onehot. NFCI.whitequark2019-01-021-0/+5
| * opt_expr: refactor simplification of signed X>=0 and X<0. NFCI.whitequark2019-01-021-8/+14