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Author
Age
Files
Lines
*
Bugfix and improvements in memory_share
Clifford Wolf
2016-04-21
1
-0
/
+21
*
Added tests/simple/graphtest.v
Clifford Wolf
2015-11-30
1
-0
/
+34
*
More bugfixes in handling of parameters in tasks and functions
Clifford Wolf
2015-11-12
1
-1
/
+12
*
Fixed handling of parameters and localparams in functions
Clifford Wolf
2015-11-11
1
-1
/
+30
*
Bugfix in memory_dff
Clifford Wolf
2015-10-31
1
-0
/
+15
*
Improvements in wreduce
Clifford Wolf
2015-10-31
1
-0
/
+9
*
Another block of spelling fixes
Larry Doolittle
2015-08-14
4
-6
/
+6
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
3
-6
/
+6
*
Various fixes for memories with offsets
Clifford Wolf
2015-02-14
1
-2
/
+2
*
Added $meminit support to "memory" command
Clifford Wolf
2015-02-14
1
-15
/
+8
*
Added $meminit test case
Clifford Wolf
2015-02-14
1
-0
/
+30
*
improvements in muxtree/select_leaves test
Clifford Wolf
2015-01-18
1
-2
/
+5
*
Improvements in opt_muxtree
Clifford Wolf
2015-01-18
1
-0
/
+8
*
Added support for task and function args in parentheses
Clifford Wolf
2014-10-27
1
-1
/
+35
*
Added multi-dim memory test (requires iverilog git head)
Clifford Wolf
2014-08-12
1
-0
/
+11
*
Improved scope resolution of local regs in Verilog+AST frontend
Clifford Wolf
2014-08-05
1
-0
/
+63
*
Fixed AST handling of variables declared inside a functions main block
Clifford Wolf
2014-08-05
1
-0
/
+13
*
Added "make -j{N}" support to "make test"
Clifford Wolf
2014-07-30
1
-1
/
+1
*
Added support for "upto" wires to Verilog front- and back-end
Clifford Wolf
2014-07-28
1
-0
/
+57
*
Renamed some of the test cases in tests/simple to avoid name collisions
Clifford Wolf
2014-07-25
15
-30
/
+30
*
Implemented dynamic bit-/part-select for memory writes
Clifford Wolf
2014-07-17
1
-1
/
+40
*
Added support for bit/part select to mem2reg rewriter
Clifford Wolf
2014-07-17
1
-0
/
+21
*
Added support for constant bit- or part-select for memory writes
Clifford Wolf
2014-07-17
1
-0
/
+20
*
Added note to "make test": use git checkout of iverilog
Clifford Wolf
2014-07-16
1
-1
/
+1
*
fixed parsing of constant with comment between size and value
Clifford Wolf
2014-07-02
1
-0
/
+7
*
Fixed handling of mixed real/int ternary expressions
Clifford Wolf
2014-06-25
1
-3
/
+6
*
Little steps in realmath test bench
Clifford Wolf
2014-06-21
1
-0
/
+6
*
Added test case for AstNode::MEM2REG_FL_CMPLX_LHS
Clifford Wolf
2014-06-17
1
-0
/
+12
*
Removed long running tests from tests/simple/realexpr.v (replaced by tests/re...
Clifford Wolf
2014-06-15
1
-55
/
+0
*
Added tests/realmath to "make test"
Clifford Wolf
2014-06-15
1
-1
/
+0
*
Added support for math functions
Clifford Wolf
2014-06-14
1
-0
/
+57
*
Added realexpr.v test case
Clifford Wolf
2014-06-14
1
-0
/
+13
*
added tests for new verilog features
Clifford Wolf
2014-06-07
2
-6
/
+37
*
Added tests/simple/repwhile.v
Clifford Wolf
2014-06-06
1
-0
/
+20
*
Progress in Verific bindings
Clifford Wolf
2014-03-17
2
-1
/
+4
*
Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)
Clifford Wolf
2014-02-03
1
-0
/
+39
*
Bugfix in name resolution with generate blocks
Clifford Wolf
2014-01-30
1
-0
/
+24
*
Added correct handling of $memwr priority
Clifford Wolf
2014-01-03
1
-0
/
+17
*
Added proper === and !== support in constant expressions
Clifford Wolf
2013-12-27
1
-0
/
+11
*
Added multiplier test case from eda playground
Clifford Wolf
2013-12-18
1
-0
/
+132
*
Added elsif preproc support
Clifford Wolf
2013-12-18
1
-1
/
+229
*
Added support for macro arguments
Clifford Wolf
2013-12-18
1
-0
/
+9
*
Various improvements in support for generate statements
Clifford Wolf
2013-12-04
1
-0
/
+27
*
Replaced RTLIL::Const::str with generic decoder method
Clifford Wolf
2013-12-04
1
-1
/
+1
*
Fix in sincos testbench gen
Clifford Wolf
2013-12-04
1
-1
/
+1
*
Added sincos test case
Clifford Wolf
2013-12-04
1
-0
/
+124
*
Implemented correct handling of signed module parameters
Clifford Wolf
2013-11-24
1
-1
/
+7
*
Added modelsim support to autotest
Clifford Wolf
2013-11-24
1
-0
/
+21
*
Another name resolution bugfix for generate blocks
Clifford Wolf
2013-11-20
1
-0
/
+48
*
Implemented indexed part selects
Clifford Wolf
2013-11-20
1
-0
/
+5
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