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* tests/bram: Do not generate write address collisions.Marcelina Koƛcielnicka2021-03-081-5/+23
* Added support for (single-clock) transparent memories to bram testsClifford Wolf2016-11-012-10/+23
* Fixed "make test" for git head of iverilogClifford Wolf2016-10-111-1/+1
* Add optional SEED=n command line option to Makefile, and -S n command line op...Eric Smith2016-09-222-4/+32
* Switched to Python 3Clifford Wolf2015-08-222-5/+2
* changed file() to open() in python scriptsClifford Wolf2015-05-111-4/+4
* Refactoring of memory_bram and xilinx bramsClifford Wolf2015-01-181-2/+2
* Added memory_bram "shuffle_enable" featureClifford Wolf2015-01-041-0/+4
* Added "memory -bram"Clifford Wolf2015-01-031-1/+1
* Added memory_bram 'or_next_if_better' featureClifford Wolf2015-01-031-3/+6
* memory_bram transp supportClifford Wolf2015-01-031-42/+66
* Progress in memory_bramClifford Wolf2015-01-033-14/+17
* Added proper clkpol support to memory_bramClifford Wolf2015-01-021-1/+1
* Fixes and improvements in bram testClifford Wolf2015-01-021-20/+8
* Progress in bram testbenchClifford Wolf2015-01-021-11/+28
* Progress in memory_bramClifford Wolf2015-01-023-13/+11
* Progress in memory_bramClifford Wolf2015-01-023-22/+32
* Progress in bram testbenchClifford Wolf2015-01-013-42/+184
* Bram testbench (incomplete)Clifford Wolf2015-01-012-0/+120