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| author | Clifford Wolf <clifford@clifford.at> | 2016-10-11 12:12:32 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-10-11 12:12:32 +0200 |
| commit | 4a981a3bd81836cd15059db56f01b60b11068742 (patch) | |
| tree | b9e698d0806ab5c3d6ba279b7f0058cd364cc8af /tests/bram | |
| parent | 59508c99b438baff1cbd57ee86ed7b304b349220 (diff) | |
| download | yosys-4a981a3bd81836cd15059db56f01b60b11068742.tar.gz yosys-4a981a3bd81836cd15059db56f01b60b11068742.tar.bz2 yosys-4a981a3bd81836cd15059db56f01b60b11068742.zip | |
Fixed "make test" for git head of iverilog
Diffstat (limited to 'tests/bram')
| -rw-r--r-- | tests/bram/run-single.sh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/bram/run-single.sh b/tests/bram/run-single.sh index 19a235c7a..98a45b613 100644 --- a/tests/bram/run-single.sh +++ b/tests/bram/run-single.sh @@ -2,7 +2,7 @@ set -e ../../yosys -qq -p "proc; opt; memory -nomap -bram temp/brams_${2}.txt; opt -fast -full" \ -l temp/synth_${1}_${2}.log -o temp/synth_${1}_${2}.v temp/brams_${1}.v -iverilog -Dvcd_file=\"temp/tb_${1}_${2}.vcd\" -DSIMLIB_MEMDELAY=1ns -o temp/tb_${1}_${2}.tb temp/brams_${1}_tb.v \ +iverilog -Dvcd_file=\"temp/tb_${1}_${2}.vcd\" -DSIMLIB_MEMDELAY=1 -o temp/tb_${1}_${2}.tb temp/brams_${1}_tb.v \ temp/brams_${1}_ref.v temp/synth_${1}_${2}.v temp/brams_${2}.v ../../techlibs/common/simlib.v temp/tb_${1}_${2}.tb > temp/tb_${1}_${2}.txt if grep -q ERROR temp/tb_${1}_${2}.txt; then |