Commit message (Expand) | Author | Age | Files | Lines | |
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* | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_req... | Eddie Hung | 2020-01-08 | 5 | -1676/+518 |
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| * | Fix abc9_xc7.box comments | Eddie Hung | 2020-01-07 | 1 | -7/+14 |
| * | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2020-01-06 | 6 | -152/+642 |
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| | * | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2020-01-06 | 5 | -1674/+509 |
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| | * | | Fix spacing | Eddie Hung | 2020-01-02 | 1 | -1/+1 |
| * | | | Fix DSP48E1 sim | Eddie Hung | 2020-01-06 | 1 | -3/+3 |
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| * | | Wrap arrival functions inside `YOSYS too | Eddie Hung | 2020-01-06 | 1 | -0/+2 |
| * | | Fix return value of arrival time functions, fix word | Eddie Hung | 2020-01-06 | 1 | -18/+14 |
| * | | Drive $[ABCD] explicitly | Eddie Hung | 2020-01-02 | 1 | -15/+21 |
| * | | Merge remote-tracking branch 'origin/master' into eddie/abc9_dsp_refactor | Eddie Hung | 2020-01-02 | 2 | -9/+9 |
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| * | | | ifndef __ICARUS__ -> ifdef YOSYS | Eddie Hung | 2020-01-01 | 1 | -2/+2 |
| * | | | Rework abc9's DSP48E1 model | Eddie Hung | 2020-01-01 | 5 | -1656/+506 |
* | | | | Merge remote-tracking branch 'origin/eddie/abc9_refactor' into xaig_arrival_r... | Eddie Hung | 2020-01-06 | 6 | -498/+1003 |
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| * | | | synth_xilinx -dff to work with abc too | Eddie Hung | 2020-01-02 | 1 | -6/+14 |
| * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2020-01-02 | 2 | -24/+44 |
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| | * | | Merge pull request #1601 from YosysHQ/eddie/synth_retime | Eddie Hung | 2020-01-02 | 1 | -3/+3 |
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| | | * | | Update doc that "-retime" calls abc with "-dff -D 1" | Eddie Hung | 2019-12-30 | 1 | -1/+1 |
| | | * | | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well"" | Eddie Hung | 2019-12-30 | 1 | -2/+2 |
| | * | | | ifdef __ICARUS__ -> ifndef YOSYS | Eddie Hung | 2020-01-01 | 1 | -6/+6 |
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| | * | | Update timings for Xilinx S7 cells | Eddie Hung | 2019-12-30 | 1 | -15/+35 |
| * | | | Update comments | Eddie Hung | 2020-01-02 | 1 | -11/+6 |
| * | | | abc9 -keepff -> -dff; refactor dff operations | Eddie Hung | 2020-01-02 | 2 | -58/+58 |
| * | | | Clamp -46ps for FDPE* too | Eddie Hung | 2020-01-01 | 1 | -2/+2 |
| * | | | Restore abc9 -keepff | Eddie Hung | 2020-01-01 | 2 | -86/+6 |
| * | | | Re-arrange FD order | Eddie Hung | 2019-12-31 | 3 | -182/+182 |
| * | | | Cleanup xilinx boxes | Eddie Hung | 2019-12-31 | 2 | -391/+425 |
| * | | | Update abc9_xc7.box comments | Eddie Hung | 2019-12-31 | 1 | -18/+18 |
| * | | | FDCE ports to be alphabetical | Eddie Hung | 2019-12-31 | 1 | -3/+3 |
| * | | | Fix attributes on $__ABC9_ASYNC[01] whitebox | Eddie Hung | 2019-12-31 | 1 | -2/+2 |
| * | | | Fix incorrect $__ABC9_ASYNC[01] box | Eddie Hung | 2019-12-31 | 1 | -2/+2 |
| * | | | Do not offset FD* box timings due to -46ps Tsu | Eddie Hung | 2019-12-30 | 1 | -12/+21 |
| * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-30 | 8 | -21/+374 |
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| | * | | Merge remote-tracking branch 'origin/master' into iopad_default | Miodrag Milanovic | 2019-12-28 | 8 | -10/+368 |
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| | * | | Addressed review comments | Miodrag Milanovic | 2019-12-21 | 1 | -2/+3 |
| | * | | iopad no op for compatibility with old scripts | Miodrag Milanovic | 2019-12-21 | 1 | -0/+3 |
| | * | | Make iopad option default for all xilinx flows | Miodrag Milanovic | 2019-12-21 | 1 | -14/+5 |
| * | | | Tidy up abc9_map.v | Eddie Hung | 2019-12-30 | 1 | -103/+103 |
| * | | | Add "synth_xilinx -dff" option, cleanup abc9 | Eddie Hung | 2019-12-30 | 2 | -2/+98 |
| * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-20 | 1 | -24/+10 |
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| * | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-20 | 4 | -172/+240 |
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| * | | | | Add RAM{32,64}M to abc9_map.v | Eddie Hung | 2019-12-19 | 1 | -0/+78 |
| * | | | | Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_t | Eddie Hung | 2019-12-19 | 5 | -36/+55 |
| * | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-19 | 12 | -77/+967 |
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| * | | | | | abc9_map.v: fix Xilinx LUTRAM | Eddie Hung | 2019-12-12 | 1 | -6/+6 |
| * | | | | | Fix comment | Eddie Hung | 2019-12-09 | 1 | -1/+1 |
| * | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-12-06 | 5 | -633/+868 |
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| * | | | | | | Remove creation of $abc9_control_wire | Eddie Hung | 2019-12-06 | 1 | -16/+6 |
| * | | | | | | abc9 to use mergeability class to differentiate sync/async | Eddie Hung | 2019-12-06 | 1 | -12/+15 |
| * | | | | | | Remove clkpart | Eddie Hung | 2019-12-05 | 1 | -4/+0 |
| * | | | | | | Revert "Special abc9_clock wire to contain only clock signal" | Eddie Hung | 2019-12-05 | 1 | -10/+12 |