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* Instead of MUXCY/XORCY use CARRY4 (with timing)Eddie Hung2019-05-211-2/+2
* Changes required for VPR place and route synth_xilinx.Keith Rothman2019-03-011-7/+275
* Fixed trailing whitespacesClifford Wolf2015-07-021-2/+2
* Various cleanups in xilinx techlibClifford Wolf2015-01-181-0/+91