aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/ice40
Commit message (Expand)AuthorAgeFilesLines
* Get rid of dffsr2dff.Marcelina Koƛcielnicka2020-04-151-1/+0
* Merge pull request #1603 from whitequark/ice40-ram_stylewhitequark2020-04-102-1/+63
|\
| * ice40: do not map FFRAM if explicitly requested otherwise.whitequark2020-04-031-1/+3
| * ice40: match memory inference attribute values case insensitive.whitequark2020-02-061-0/+1
| * ice40: add support for both 1364.1 and LSE RAM/ROM attributes.whitequark2020-02-061-0/+59
* | kernel: big fat patch to use more ID::*, otherwise ID(*)Eddie Hung2020-04-024-75/+75
* | kernel: use more ID::*Eddie Hung2020-04-023-17/+17
* | Fix indentation in `techlibs/ice40/synth_ice40.cc`.Alberto Gonzalez2020-04-011-4/+4
* | Merge pull request #1794 from YosysHQ/dave/mince-abc9-fixDavid Shah2020-03-211-0/+1
|\ \
| * | ice40: Map unmapped 'mince' DFFs to gate levelDavid Shah2020-03-201-0/+1
* | | ice40: Fix typos in SPRAM ABC9 timing specsSylvain Munaut2020-03-201-2/+2
|/ /
* | ice40: Fix SPRAM model to keep data stable if chipselect is lowSylvain Munaut2020-03-141-5/+8
* | ice40: fix specify for ICE40_{LP,U}Eddie Hung2020-03-051-4/+4
* | ice40: fix implicit signal in specify, also clamp negative times to 0Eddie Hung2020-03-041-22/+22
* | Merge pull request #1691 from ZirconiumX/use-flowmap-in-noabcN. Engelhardt2020-03-031-4/+22
|\ \
| * | Add -flowmap to synth and synth_ice40Dan Ravensloft2020-02-281-4/+22
| |/
* | ice40: add delays to SB_CARRYEddie Hung2020-02-271-0/+30
* | More +/ice40/cells_sim.v fixesEddie Hung2020-02-271-27/+27
* | ice40: fix specify for inverted clocksEddie Hung2020-02-271-27/+27
* | ice40: specify fixesEddie Hung2020-02-273-66/+66
* | ice40: move over to specify blocks for -abc9Eddie Hung2020-02-2710-164/+1344
|/
* synth_*: call 'opt -fast' after 'techmap'Eddie Hung2020-02-051-0/+1
* Fix $lut input ordering -- SigSpec(std::initializer_list<>) is backwardsEddie Hung2020-01-271-1/+1
* Import tests from #1628Eddie Hung2020-01-271-2/+2
* xilinx/ice40/ecp5: undo permuting LUT masks in lut_mapEddie Hung2020-01-271-7/+6
* Merge pull request #1656 from YosysHQ/eddie/ice40_abc9_warningsEddie Hung2020-01-274-6/+10
|\
| * ice40: reduce ABC9 internal fanout warnings with a param for CI->I3Eddie Hung2020-01-244-6/+10
* | ice40: add SB_SPRAM256KA arrival timeEddie Hung2020-01-241-0/+1
|/
* Merge pull request #1602 from niklasnisbeth/ice40-init-vals-warningDavid Shah2020-01-181-2/+8
|\
| * ice40: Demote conflicting FF init values to a warningNiklas Nisbeth2019-12-311-2/+8
* | synth_ice40: call wreduce before mul2dspEddie Hung2020-01-171-1/+2
* | synth_ice40: -abc2 to always use `abc` even if `-abc9`Eddie Hung2020-01-121-10/+10
* | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-061-0/+2
|\ \
| * | Valid to have attribute starting with SB_CARRY.Miodrag Milanovic2020-01-041-0/+2
* | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-021-2/+2
|\| |
| * | Update doc that "-retime" calls abc with "-dff -D 1"Eddie Hung2019-12-301-1/+1
| * | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""Eddie Hung2019-12-301-1/+1
| |/
| * Revert "Optimise write_xaiger"Eddie Hung2019-12-201-5/+0
| * Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanupEddie Hung2019-12-191-0/+5
| |\
| | * techmap/aigmap of whiteboxes to occur before abc9 instead of in write_xaigerEddie Hung2019-12-061-0/+5
* | | Cleanup ice40 boxesEddie Hung2019-12-313-30/+43
|/ /
* | ice40_opt to restore attributes/name when unwrappingEddie Hung2019-12-091-0/+15
* | Sensitive to direct inst of $__ICE40_CARRY_WRAPPER; recreate SB_LUT4Eddie Hung2019-12-091-1/+1
* | ice40_wrapcarry to really preserve attributes via -unwrap optionEddie Hung2019-12-092-19/+1
* | $__ICE40_CARRY_WRAPPER to use _TECHMAP_REPLACE_ for SB_CARRY to preserveEddie Hung2019-12-031-1/+1
* | ice40_opt to ignore (* keep *) -ed cellsEddie Hung2019-12-031-0/+5
|/
* Merge pull request #1490 from YosysHQ/clifford/autonameClifford Wolf2019-11-141-0/+1
|\
| * Add "autoname" pass and use it in "synth_ice40"Clifford Wolf2019-11-131-0/+1
* | Merge pull request #1465 from YosysHQ/dave/ice40_timing_simClifford Wolf2019-11-141-14/+436
|\ \ | |/ |/|
| * ice40: Add post-pnr ICESTORM_RAM model and fix FFsDavid Shah2019-10-231-2/+340