| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth_gatemate Revert cascade A/B port mixup | Patrick Urban | 2021-11-13 | 1 | -4/+4 |
| * | synth_gatemate: Add block RAM cascade support | Patrick Urban | 2021-11-13 | 1 | -23/+11 |
| * | synth_gatemate: Revise block RAM read modes and initialization | Patrick Urban | 2021-11-13 | 1 | -29/+22 |
| * | synth_gatemate: Initial implementation | Patrick Urban | 2021-11-13 | 1 | -0/+539 |
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index : iCE40/yosys | |
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