| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | ecp5: Fixing 'X' issues with LUT simulation models | David Shah | 2018-07-16 | 1 | -6/+19 | |
| * | ecp5: ECP5 synthesis fixes | David Shah | 2018-07-16 | 1 | -13/+26 | |
| * | ecp5: Cells and mappings fixes | David Shah | 2018-07-13 | 1 | -2/+2 | |
| * | ecp5: Adding DFF maps | David Shah | 2018-07-13 | 1 | -1/+1 | |
| * | ecp5: Adding DRAM map | David Shah | 2018-07-13 | 1 | -1/+36 | |
| * | ecp5: Adding basic cells_sim and mapper for LUTs up to LUT7 | David Shah | 2018-07-13 | 1 | -0/+387 | |
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index : iCE40/yosys | |
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