iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Fix spacing	Eddie Hung	2019-08-06	1	-3/+3
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*	Make liberal use of IdString.in()	Eddie Hung	2019-08-06	1	-14/+8
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*	Unify usage of noflatten among architectures	Miodrag Milanovic	2019-01-04	1	-1/+1
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*	Fix typographical and grammatical errors and inconsistencies.	whitequark	2019-01-02	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \|	The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually.
*	Consistent use of 'override' for virtual methods in derived classes.	Henner Zeller	2018-07-20	2	-6/+6
\| \| \| \| \| \| \| \| \|	o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -- c++ -- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
*	coolrunner2: Add an ANDTERM/XOR between chained FFs	Robert Ou	2018-03-31	1	-0/+58
\| \| \| \| \| \| \|	In some cases (e.g. the low bits of counters) the design might end up with a flip-flop whose input is directly driven by another flip-flop. This isn't possible in the Coolrunner-II architecture, so add a single AND term and XOR in this case.
*	coolrunner2: Split multi-bit nets	Robert Ou	2018-03-31	1	-0/+1
\| \| \| \| \|	The PAR tool doesn't expect any "dangling" nets with no drivers nor sinks. By splitting the nets, clean removes them.
*	coolrunner2: Add extraction for TFFs	Robert Ou	2018-03-31	3	-0/+54
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*	coolrunner2: Move LOC attributes onto the IO cells	Robert Ou	2018-01-17	1	-0/+2
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*	coolrunner2: Finish fixing special-use p-terms	Robert Ou	2017-09-01	1	-8/+20
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*	coolrunner2: Generate a feed-through AND term when necessary	Robert Ou	2017-09-01	1	-13/+31
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*	coolrunner2: Initial fixes for special p-terms	Robert Ou	2017-09-01	2	-1/+81
\| \| \| \| \|	Certain signals can only be controlled by a product term and not a sum-of-products. Do the initial work for fixing this.
*	coolrunner2: Fix mapping of flip-flops	Robert Ou	2017-09-01	1	-1/+0
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*	coolrunner2: Combine some for loops together	Robert Ou	2017-09-01	1	-16/+14
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*	coolrunner2: Add INVERT parameter to some BUFGs	Robert Ou	2017-08-14	1	-2/+6
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*	coolrunner2: Add FFs with clock enable to cells_sim.v	Robert Ou	2017-08-14	1	-0/+60
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*	Fix some c++ clang compiler errors	Clifford Wolf	2017-07-03	1	-3/+3
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*	Apply minor coding style changes to coolrunner2 target	Clifford Wolf	2017-07-03	2	-1/+1
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*	coolrunner2: Add a few more primitives	Robert Ou	2017-06-25	1	-0/+110
\| \| \| \|	These cannot be inferred yet, but add them to cells_sim.v for now
*	coolrunner2: Initial mapping of latches	Robert Ou	2017-06-25	4	-0/+63
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*	coolrunner2: Initial mapping of DFFs	Robert Ou	2017-06-25	4	-0/+76
\| \| \| \| \|	All DFFs map to either FDCP (matches Xilinx) or a custom FDCP_N (negative-edge triggered)
*	coolrunner2: Remove redundant INVERT_PTC	Robert Ou	2017-06-25	2	-4/+1
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*	coolrunner2: Remove debug prints	Robert Ou	2017-06-25	1	-2/+0
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*	coolrunner2: Correctly handle $_NOT_ after $sop	Robert Ou	2017-06-25	1	-5/+41
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*	coolrunner2: Also construct the XOR cell in the macrocell	Robert Ou	2017-06-25	2	-7/+34
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*	coolrunner2: Initial techmapping for $sop	Robert Ou	2017-06-25	4	-153/+268
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*	coolrunner2: Initial commit	Robert Ou	2017-06-24	3	-0/+223