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path: root/techlibs/common/simlib.v
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* Reformat so it shows up/looks nice when "help $alu" and "help $alu+"Eddie Hung2019-08-091-25/+34
* A bit more on where $lcu comes fromEddie Hung2019-08-091-0/+2
* Add more commentsEddie Hung2019-08-091-4/+18
* Add a few comments to document $alu and $lcuEddie Hung2019-08-081-9/+12
* Improve $specrule interfaceClifford Wolf2019-04-231-2/+2
* Improve $specrule interfaceClifford Wolf2019-04-231-3/+4
* Add $specrule cells for $setup/$hold/$skew specify rulesClifford Wolf2019-04-231-0/+28
* Rename T_{RISE,FALL}_AVG to T_{RISE,FALL}_TYP to better match verilog std nom...Clifford Wolf2019-04-231-70/+70
* Add $specify2 and $specify3 cells to simlibClifford Wolf2019-04-231-0/+147
* Add $allconst and $allseq cell typesClifford Wolf2018-02-231-0/+24
* Add $live and $fair cell types, add support for s_eventually keywordClifford Wolf2017-02-251-0/+16
* Add $cover cell type and SVA cover() supportClifford Wolf2017-02-041-0/+8
* Added $anyseq cell typeClifford Wolf2016-10-141-0/+12
* Added $global_clock verilog syntax support for creating $ff cellsClifford Wolf2016-10-141-2/+6
* Added $ff and $_FF_ cell typesClifford Wolf2016-10-121-0/+13
* Removed $aconst cell typeClifford Wolf2016-08-301-12/+0
* Removed $predict againClifford Wolf2016-08-281-8/+0
* Added $anyconst and $aconstClifford Wolf2016-07-271-0/+24
* Added $initstate cell type and vlog functionClifford Wolf2016-07-211-0/+17
* After reading the SV spec, using non-standard predict() instead of expect()Clifford Wolf2016-07-211-9/+1
* Added basic support for $expect cellsClifford Wolf2016-07-131-0/+16
* Improved support for $sop cellsClifford Wolf2016-06-171-3/+3
* Added $sop cell type and "abc -sop"Clifford Wolf2016-06-171-0/+28
* Added more cell help messagesClifford Wolf2016-03-291-0/+73
* Added read-enable to memory modelClifford Wolf2015-09-251-4/+5
* Added $tribuf and $_TBUF_ sim modelsClifford Wolf2015-08-161-0/+14
* Another block of spelling fixesLarry Doolittle2015-08-141-2/+2
* Added WORDS parameter to $meminitClifford Wolf2015-07-311-1/+2
* Fixed trailing whitespacesClifford Wolf2015-07-021-2/+2
* make all vector-size related integer params in $mem sim model signedClifford Wolf2015-04-051-6/+6
* Added $assume cell typeClifford Wolf2015-02-261-1/+18
* Smaller default parameters in $mem simlib modelClifford Wolf2015-02-151-2/+2
* Added $meminit support to "memory" commandClifford Wolf2015-02-141-3/+15
* Added $meminit cell typeClifford Wolf2015-02-141-0/+22
* Some test related fixesClifford Wolf2015-02-121-4/+4
* Added $equiv cell typeClifford Wolf2015-01-191-1/+23
* Progress in memory_bramClifford Wolf2015-01-031-0/+3
* Added proper clkpol support to memory_bramClifford Wolf2015-01-021-1/+1
* New $mem simlib modelClifford Wolf2015-01-021-95/+36
* Fixed simlib entries for $memrd and $memwrClifford Wolf2014-12-301-0/+2
* Added $dffe cell typeClifford Wolf2014-12-081-0/+19
* Fixed $macc simlib model for zero-configClifford Wolf2014-09-161-1/+1
* Fixed simlib $macc model for xilinx xsimClifford Wolf2014-09-081-1/+15
* Simplified $fa undef modelClifford Wolf2014-09-081-1/+1
* Fixes and cleanups for blackbox.vClifford Wolf2014-09-081-68/+70
* Added $lcu cell typeClifford Wolf2014-09-081-0/+23
* Added "$fa" cell typeClifford Wolf2014-09-081-0/+16
* Various bug fixes (related to $macc model testing)Clifford Wolf2014-09-061-1/+1
* Added $macc SAT modelClifford Wolf2014-09-061-3/+3
* Added $macc simlib model (also use as techmap rule for now)Clifford Wolf2014-09-061-0/+86