iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Mostly coding style related fixes in rmports pass	Clifford Wolf	2017-08-15	1	-30/+33
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*	Merge branch 'rmports' of https://github.com/azonenberg/yosys into ↵	Clifford Wolf	2017-08-15	2	-0/+185
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\| *	rmports: Now remove ports from cell instances if we optimized them out of ↵	Andrew Zonenberg	2017-08-14	1	-2/+35
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\| *	ProcessModule is no longer virtual (why was it in the first place?)	Andrew Zonenberg	2017-08-14	1	-1/+1
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\| *	rmports now works on all modules in the design, not just the top.	Andrew Zonenberg	2017-08-14	1	-4/+7
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\| *	Updated Makefile to reflect opt_rmports being renamed to rmports	Andrew Zonenberg	2017-08-14	1	-1/+1
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\| *	Renamed opt_rmports pass to rmports	Andrew Zonenberg	2017-08-14	1	-5/+5
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\| *	Improved handling of constant connections in opt_rmports	Andrew Zonenberg	2017-08-14	1	-0/+2
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\| *	Fixed handling of cell ports that aren't wires	Andrew Zonenberg	2017-08-14	1	-0/+3
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\| *	opt_rmports: Fixed incorrect handling of multi-bit nets	Andrew Zonenberg	2017-08-14	1	-12/+27
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\| *	Removed commented out debug code	Andrew Zonenberg	2017-08-14	1	-4/+0
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\| *	Added opt_rmports pass (remove unconnected ports from top-level modules)	Andrew Zonenberg	2017-08-14	2	-0/+133
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* \|	abc: Allow +/ filenames in the abc command	Robert Ou	2017-08-14	1	-0/+3
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*	Add support for set-reset cell variants to opt_rmdff	Clifford Wolf	2017-08-09	1	-0/+182
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*	Add handling of constant reset signals to opt_rmdff	Clifford Wolf	2017-08-06	1	-1/+23
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*	Fix typo in "abc" pass help message	Clifford Wolf	2017-07-29	1	-1/+1
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*	Add consolidation of init attributes to opt_clean, some opt_clean log fixes	Clifford Wolf	2017-07-29	1	-6/+82
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*	Add "opt_expr -fine" feature to remove neutral bits from reduce and logic ↵	Clifford Wolf	2017-07-26	1	-0/+47
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*	Add error for cell output ports that are connected to constants	Clifford Wolf	2017-07-22	1	-20/+21
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*	Fix handling of empty cell port assignments (i.e. ignore them)	Clifford Wolf	2017-07-21	2	-0/+6
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*	Add $alu to list of supported cells for "stat -width"	Clifford Wolf	2017-07-14	1	-1/+1
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*	Excluded $_TBUF_ from opt_merge pass	Salvador E. Tropea	2017-07-03	1	-0/+1
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*	Fix and_or_buffer optimization in opt_expr for signed operators	Clifford Wolf	2017-07-01	1	-2/+2
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*	Add "design -import"	Clifford Wolf	2017-06-30	1	-3/+94
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*	Add chtype command	Clifford Wolf	2017-06-30	2	-0/+84
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*	Add $tribuf to opt_merge blacklist	Clifford Wolf	2017-06-30	1	-0/+1
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*	Fix handling of init values in "abc -dff" and "abc -clk"	Clifford Wolf	2017-06-20	1	-131/+176
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*	Switched abc "clock domain not found" error to log_cmd_error()	Clifford Wolf	2017-06-20	1	-24/+28
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*	Add "setundef -anyseq"	Clifford Wolf	2017-05-28	2	-3/+44
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*	Improve write_aiger handling of unconnected nets and constants	Clifford Wolf	2017-05-28	1	-1/+1
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*	Add aliases for common sets of gate types to "abc -g"	Clifford Wolf	2017-05-24	1	-2/+74
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*	Add $_ANDNOT_ and $_ORNOT_ gates	Clifford Wolf	2017-05-17	1	-21/+41
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*	Fix equiv_simple, old behavior now available with "equiv_simple -short"	Clifford Wolf	2017-04-28	1	-10/+41
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*	Squelch trailing whitespace	Larry Doolittle	2017-04-12	4	-7/+7
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*	Fix gcc compiler warning	Clifford Wolf	2017-04-05	1	-1/+1
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*	Disable opt_merge for $anyseq and $anyconst	Clifford Wolf	2017-02-28	1	-0/+3
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*	Add "chformal -assert2assume" and friends	Clifford Wolf	2017-02-28	1	-0/+44
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*	Add "chformal" pass	Clifford Wolf	2017-02-27	2	-0/+239
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*	Add $live and $fair cell types, add support for s_eventually keyword	Clifford Wolf	2017-02-25	3	-4/+2
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*	Copy attributes to _TECHMAP_REPLACE_ cells	Clifford Wolf	2017-02-16	1	-2/+8
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*	Do not fix port widths on any blackbox instances	Clifford Wolf	2017-02-13	1	-1/+1
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*	Fix techmap for inout ports connected to inout ports	Clifford Wolf	2017-02-13	1	-2/+7
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*	Do not eagerly fix port widths on parameterized cells	Clifford Wolf	2017-02-12	1	-0/+3
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*	Fixed some "used uninitialized" warnings in opt_expr	Clifford Wolf	2017-02-11	1	-1/+2
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*	Add optimization of (a && 1'b1) and (a \|\| 1'b0)	Clifford Wolf	2017-02-11	1	-7/+22
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*	Fix issue #306, "Bug in opt -full"	C-Elegans	2017-02-10	1	-1/+19
\| \| \| \| \| \|	Add check for whether the high bit in the constant expression is greater than the width of the variable, and optimizes that to a constant 1 or 0
*	Fix handling of init attributes with strange width	Clifford Wolf	2017-02-09	2	-3/+9
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*	Add $cover cell type and SVA cover() support	Clifford Wolf	2017-02-04	2	-2/+2
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*	Update ABC scripts to use "&nf" instead of "map"	Clifford Wolf	2017-02-01	1	-3/+3
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*	Fix indenting and log messages in code merged from opt_compare_pr	Clifford Wolf	2017-01-31	1	-102/+120
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