iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
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*	Added torder command	Clifford Wolf	2015-11-19	2	-0/+124
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*	Added "abc -g"	Clifford Wolf	2015-11-10	1	-11/+48
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*	Fix a segfault in dffinit when the value has too few bits	Marcus Comstedt	2015-11-08	1	-1/+1
\| \| \| \| \|	The code was already trying to add the required number of bits, but fell one short of the mark.
*	Added "singleton" pass	Clifford Wolf	2015-11-07	2	-0/+102
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*	Bugfix in mapping $tribuf to $_TBUF_	Clifford Wolf	2015-11-05	1	-1/+1
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*	Bugfix in memory_dff	Clifford Wolf	2015-10-31	1	-1/+12
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*	Improvements in wreduce	Clifford Wolf	2015-10-31	1	-0/+25
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*	Use mfp<> in equiv_mark	Clifford Wolf	2015-10-27	1	-28/+4
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*	Improvements in equiv_struct	Clifford Wolf	2015-10-25	1	-17/+62
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*	Major refactoring of equiv_struct	Clifford Wolf	2015-10-25	1	-93/+165
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*	Import more std:: stuff into Yosys namespace	Clifford Wolf	2015-10-25	26	-87/+87
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*	Added "equiv_add -cell"	Clifford Wolf	2015-10-25	1	-32/+93
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*	equiv_struct now creates equiv_merged attributes	Clifford Wolf	2015-10-25	1	-0/+3
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*	Improvements in equiv_struct	Clifford Wolf	2015-10-24	1	-1/+22
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*	renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()	Clifford Wolf	2015-10-24	5	-19/+19
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*	improvement in "stat"	Clifford Wolf	2015-10-24	1	-1/+1
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*	equiv_purge bugfix, using SigChunk in Yosys namespace	Clifford Wolf	2015-10-24	4	-5/+6
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*	Fixed handling of driver-driver conflicts in wreduce	Clifford Wolf	2015-10-24	1	-8/+16
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*	Added equiv_mark command	Clifford Wolf	2015-10-23	3	-1/+265
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*	Disabled "Skipping blackbox module" msg in show command	Clifford Wolf	2015-10-23	1	-1/+1
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*	Also merge $equiv cells in equiv_struct	Clifford Wolf	2015-10-23	1	-0/+1
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*	Improvements in equiv_struct	Clifford Wolf	2015-10-23	1	-11/+18
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*	Added equiv_purge	Clifford Wolf	2015-10-22	2	-0/+210
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*	Added equiv_struct command	Clifford Wolf	2015-10-21	2	-0/+188
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*	Improved inout handling in equiv_make	Clifford Wolf	2015-10-21	1	-1/+1
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*	Bugfixes in handling of "keep" attribute on wires	Clifford Wolf	2015-10-15	2	-2/+8
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*	Fixed "flatten" for unconnected inout ports	Clifford Wolf	2015-10-13	1	-1/+1
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*	Added edgetypes command	Clifford Wolf	2015-09-27	2	-0/+107
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*	Some cleanups in qwp	Clifford Wolf	2015-09-26	1	-7/+16
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*	Added "test_cell -noeval"	Clifford Wolf	2015-09-25	1	-1/+10
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*	Added wreduce $mul support and fixed signed $mul opt_const bug	Clifford Wolf	2015-09-25	2	-5/+37
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*	Bugfix in bram read-enable code	Clifford Wolf	2015-09-25	1	-2/+5
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*	Added read-enable to memory model	Clifford Wolf	2015-09-25	5	-42/+101
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*	Added pivoting to qwp solver	Clifford Wolf	2015-09-24	1	-14/+43
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*	Improved qwp performance	Clifford Wolf	2015-09-24	1	-49/+25
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*	Added statistics summary to "qwp"	Clifford Wolf	2015-09-24	1	-0/+77
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*	Fixed memory_bram for ROMs in BRAMs with write-enable inputs	Clifford Wolf	2015-09-24	1	-1/+1
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*	Do not detect fsm state registers with init attribute	Clifford Wolf	2015-09-21	1	-0/+2
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*	Bugfix in "qwp" pass	Clifford Wolf	2015-09-21	1	-6/+31
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*	Improvements and fixes in "qwp" pass	Clifford Wolf	2015-09-21	1	-29/+74
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*	Added "qwp -dump"	Clifford Wolf	2015-09-20	1	-21/+115
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*	Added "qwp" command	Clifford Wolf	2015-09-20	2	-0/+586
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*	Added nlutmap	Clifford Wolf	2015-09-18	2	-0/+174
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*	Added lut2mux pass	Clifford Wolf	2015-09-18	2	-0/+94
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*	Added buffer detection to "abc -lut"	Clifford Wolf	2015-09-18	1	-0/+6
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*	Added support for "dfflibmap -liberty +/..."	Clifford Wolf	2015-09-18	1	-0/+1
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*	Added detection of "mux inverter" chains in opt_const	Clifford Wolf	2015-09-18	1	-0/+2
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*	Added $logic_not handling to fsm_detect	Clifford Wolf	2015-09-18	1	-0/+2
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*	Fixed sharing of $memrd cells	Clifford Wolf	2015-09-12	1	-0/+4
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*	Fixed port ordering in "splitnets" cmd	Clifford Wolf	2015-09-01	1	-7/+18
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