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* Preserve topo ordering from -prep_holes to write_xaigerEddie Hung2020-01-032-5/+2
* WIPEddie Hung2020-01-032-14/+40
* WIPEddie Hung2020-01-031-7/+7
* Remove a few log_{push,pop}()Eddie Hung2020-01-022-8/+0
* aigmap everythingEddie Hung2020-01-021-1/+1
* Move scc operations out of inner loopEddie Hung2020-01-021-8/+4
* CleanupEddie Hung2020-01-021-2/+1
* Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactorEddie Hung2020-01-023-99/+55
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| * Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-022-11/+18
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| * | Update docEddie Hung2020-01-021-4/+4
| * | abc9 -keepff -> -dff; refactor dff operationsEddie Hung2020-01-021-19/+30
| * | Cleanup abc9, update doc for -keepff optionEddie Hung2020-01-011-6/+5
| * | Restore abc9 -keepffEddie Hung2020-01-011-39/+40
| * | attributes.count() -> get_bool_attribute()Eddie Hung2020-01-011-2/+2
| * | parse_xaiger to not take box_lookupEddie Hung2019-12-311-43/+4
| * | Do not re-order carry chain ports, just precompute iteration orderEddie Hung2019-12-311-22/+0
* | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactorEddie Hung2020-01-022-11/+18
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| * | Merge pull request #1601 from YosysHQ/eddie/synth_retimeEddie Hung2020-01-021-11/+15
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| | * | Revert "ABC to call retime all the time"Eddie Hung2019-12-301-11/+15
| * | | take skip wire bits into accountMiodrag Milanovic2020-01-011-0/+3
* | | | Remove abc9 -clk optionEddie Hung2019-12-301-1/+1
* | | | abc9_ops -prep_dff cope with lack of holes moduleEddie Hung2019-12-301-38/+38
* | | | Rename structEddie Hung2019-12-301-3/+3
* | | | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactorEddie Hung2019-12-301-9/+0
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| * | | Remove delay targets docEddie Hung2019-12-301-9/+0
* | | | Move Pass::call() out of abc9_ops into abc9Eddie Hung2019-12-302-68/+59
* | | | Use function argEddie Hung2019-12-301-9/+9
* | | | holes_module to be whiteboxEddie Hung2019-12-301-0/+10
* | | | Add abc9_ops -prep_holesEddie Hung2019-12-302-3/+313
* | | | Add abc9_ops -prep_dffEddie Hung2019-12-303-39/+50
* | | | Restore count_outputs, move process check to abcEddie Hung2019-12-302-11/+13
* | | | Fix struct nameEddie Hung2019-12-301-3/+3
* | | | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactorEddie Hung2019-12-302-323/+124
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| * | | write_xaiger to use scratchpad for stats; cleanup abc9Eddie Hung2019-12-301-173/+15
| * | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-301-23/+68
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| * | | Add "synth_xilinx -dff" option, cleanup abc9Eddie Hung2019-12-301-49/+19
| * | | GrammarEddie Hung2019-12-301-1/+1
| * | | Disable clock domain partitioning in Yosys pass, let ABC do itEddie Hung2019-12-231-6/+22
| * | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-201-19/+18
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| * | | | Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_tEddie Hung2019-12-191-5/+5
| * | | | Remove &verify -sEddie Hung2019-12-171-1/+1
| * | | | Use pool<> instead of std::set<> to preserver orderingEddie Hung2019-12-171-6/+6
| * | | | Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flopEddie Hung2019-12-161-5/+27
| * | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-12-062-175/+137
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| * | | | | Call abc9 with "&write -n", and parse_xaiger() to copeEddie Hung2019-12-061-2/+2
| * | | | | Fix abc9 re-integration, remove abc9_control_wire, use cell->type asEddie Hung2019-12-061-39/+15
| * | | | | abc9 to do clock partitioning againEddie Hung2019-12-051-37/+144
| * | | | | Add assertionEddie Hung2019-12-031-0/+1
| * | | | | Add abc9_init wire, attach to abc9_flop cellEddie Hung2019-12-031-2/+12
| * | | | | CleanupEddie Hung2019-12-011-3/+2