Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Refactoring: Renamed RTLIL::Design::modules to modules_ | Clifford Wolf | 2014-07-27 | 1 | -11/+11 | |
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* | Refactoring: Renamed RTLIL::Module::cells to cells_ | Clifford Wolf | 2014-07-27 | 1 | -5/+5 | |
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* | Refactoring: Renamed RTLIL::Module::wires to wires_ | Clifford Wolf | 2014-07-27 | 1 | -8/+8 | |
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* | Changed more code to the new RTLIL::Wire constructors | Clifford Wolf | 2014-07-26 | 1 | -6/+4 | |
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* | Manual fixes for new cell connections API | Clifford Wolf | 2014-07-26 | 1 | -1/+1 | |
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* | Changed users of cell->connections_ to the new API (sed command) | Clifford Wolf | 2014-07-26 | 1 | -9/+9 | |
| | | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;' | |||||
* | Renamed RTLIL::{Module,Cell}::connections to connections_ | Clifford Wolf | 2014-07-26 | 1 | -9/+9 | |
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* | Added copy-constructor-like module->addCell(name, other) method | Clifford Wolf | 2014-07-26 | 1 | -8/+4 | |
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* | Use only module->addCell() and module->remove() to create and delete cells | Clifford Wolf | 2014-07-25 | 1 | -16/+21 | |
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* | Fixed all users of SigSpec::chunks_rw() and removed it | Clifford Wolf | 2014-07-23 | 1 | -8/+9 | |
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* | SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, ↵ | Clifford Wolf | 2014-07-22 | 1 | -1/+1 | |
| | | | | created interim RTLIL::SigSpec::chunks_rw() | |||||
* | SigSpec refactoring: using the accessor functions everywhere | Clifford Wolf | 2014-07-22 | 1 | -9/+9 | |
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* | SigSpec refactoring: renamed chunks and width to __chunks and __width | Clifford Wolf | 2014-07-22 | 1 | -9/+9 | |
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* | Added call_on_selection() and call_on_module() API | Clifford Wolf | 2014-07-20 | 1 | -9/+1 | |
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* | Added support for "blackbox" attribute to flatten/techmap | Clifford Wolf | 2014-07-17 | 1 | -1/+4 | |
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* | be more verbose when techmap yielded processes | Johann Glaser | 2014-05-26 | 1 | -1/+5 | |
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* | Merged OSX fixes from Siesh1oo with some modifications | Clifford Wolf | 2014-03-13 | 1 | -0/+1 | |
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* | - kernel/register.h, kernel/driver.cc: refactor ↵ | Siesh1oo | 2014-03-12 | 1 | -1/+2 | |
| | | | | | | | rewrite_yosys_exe()/get_share_file_name() to portable proc_self_dirname()/proc_share_dirname(). This refactoring improves robustness and allows OSX support with only 7 new lines of code, and easy extension for other systems. - passes/abc/abc.cc, passes/cmds/show.cc, passes/techmap/techmap.cc: use new, refactored semantics. | |||||
* | Added techmap -max_iter option | Clifford Wolf | 2014-03-06 | 1 | -0/+10 | |
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* | Added _TECHMAP_REPLACE_ feature to techmap | Clifford Wolf | 2014-02-20 | 1 | -4/+21 | |
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* | Added techmap support for _TECHMAP_CONNMAP_*_ | Clifford Wolf | 2014-02-18 | 1 | -0/+39 | |
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* | Better preserve wires when flattening (in comparison to techmap) | Clifford Wolf | 2014-02-17 | 1 | -12/+12 | |
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* | Added some additional checks to techmap | Clifford Wolf | 2014-02-16 | 1 | -0/+14 | |
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* | Added CONSTMSK and CONSTVAL feature to techmap | Clifford Wolf | 2014-02-16 | 1 | -0/+23 | |
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* | Added recursion support to techmap | Clifford Wolf | 2014-02-16 | 1 | -260/+262 | |
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* | Changed techmap description from "simple" to "generic" | Clifford Wolf | 2014-02-06 | 1 | -1/+1 | |
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* | Replaced signed_parameters API with CONST_FLAG_SIGNED | Clifford Wolf | 2013-12-04 | 1 | -1/+1 | |
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* | Replaced RTLIL::Const::str with generic decoder method | Clifford Wolf | 2013-12-04 | 1 | -15/+3 | |
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* | Using simplemap mappers from techmap | Clifford Wolf | 2013-11-24 | 1 | -3/+34 | |
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* | Added module->avail_parameters (for advanced techmap features) | Clifford Wolf | 2013-11-24 | 1 | -2/+8 | |
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* | Added techmap -D and -I options | Clifford Wolf | 2013-11-24 | 1 | -2/+16 | |
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* | Added "techmap -share_map" option | Clifford Wolf | 2013-11-24 | 1 | -0/+9 | |
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* | Implemented correct handling of signed module parameters | Clifford Wolf | 2013-11-24 | 1 | -1/+1 | |
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* | Fixed "flatten" top-module detection: Only use on fully selected designs | Clifford Wolf | 2013-11-24 | 1 | -3/+4 | |
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* | Added "top" attribute to mark top module in hierarchy | Clifford Wolf | 2013-11-24 | 1 | -3/+26 | |
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* | Improved handling of techmap special wires | Clifford Wolf | 2013-11-23 | 1 | -1/+3 | |
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* | Added more generic _TECHMAP_ wire mechanism to techmap pass | Clifford Wolf | 2013-11-23 | 1 | -77/+185 | |
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* | Call internal checker more often | Clifford Wolf | 2013-11-10 | 1 | -0/+2 | |
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* | Improved way of connecting ports in techmap pass | Clifford Wolf | 2013-10-17 | 1 | -18/+36 | |
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* | Added techmap -opt mode | Clifford Wolf | 2013-08-09 | 1 | -7/+39 | |
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* | Fixed techmap/flatten for positional module arguments | Clifford Wolf | 2013-05-26 | 1 | -8/+20 | |
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* | Added missing newline to some error messages | Clifford Wolf | 2013-05-23 | 1 | -2/+2 | |
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* | Added support for const cell inputs in techmap | Clifford Wolf | 2013-04-27 | 1 | -6/+28 | |
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* | Added "flatten" pass | Clifford Wolf | 2013-04-26 | 1 | -1/+41 | |
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* | Added proper TECHMAP_FAIL support and added support for the celltype ↵ | Clifford Wolf | 2013-03-28 | 1 | -84/+129 | |
| | | | | attribute in the map file | |||||
* | fixed typos | Johann Glaser | 2013-03-18 | 1 | -2/+2 | |
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* | Automatically select new objects in abc and techmap passes | Clifford Wolf | 2013-03-08 | 1 | -0/+2 | |
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* | Added more help messages | Clifford Wolf | 2013-03-01 | 1 | -6/+34 | |
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* | initial import | Clifford Wolf | 2013-01-05 | 1 | -0/+207 | |