| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix sim for assignments with lhs<rhs size, fixes #1565 | Clifford Wolf | 2019-12-17 | 1 | -1/+1 |
| * | Error out if no top module given before 'sim' | Eddie Hung | 2019-06-05 | 1 | -0/+5 |
| * | Fixed minor typo in "sim" help message | acw1251 | 2018-09-12 | 1 | -1/+1 |
| * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 |
| * | Rename "singleton" pass to "uniquify" | Clifford Wolf | 2017-08-20 | 1 | -1/+1 |
| * | Add "sim -zinit -rstlen" | Clifford Wolf | 2017-08-18 | 1 | -1/+53 |
| * | Add "sim" support for memories | Clifford Wolf | 2017-08-18 | 1 | -2/+136 |
| * | Add support for assert/assume/cover to "sim" command | Clifford Wolf | 2017-08-18 | 1 | -4/+47 |
| * | Add writeback mode to "sim" command | Clifford Wolf | 2017-08-17 | 1 | -0/+44 |
| * | Improve "sim" command | Clifford Wolf | 2017-08-17 | 1 | -54/+272 |
| * | Add "sim" command skeleton | Clifford Wolf | 2017-08-16 | 1 | -0/+371 |
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