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passes
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sat
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miter.cc
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Author
Age
Files
Lines
*
Fixing old e-mail addresses and deadnames
Claire Xenia Wolf
2021-06-08
1
-1
/
+1
*
Use C++11 final/override keywords.
whitequark
2020-06-18
1
-2
/
+2
*
kernel: big fat patch to use more ID::*, otherwise ID(*)
Eddie Hung
2020-04-02
1
-49
/
+49
*
kernel: use more ID::*
Eddie Hung
2020-04-02
1
-24
/
+24
*
Clean up pseudo-private member usage in `passes/sat/miter.cc`.
Alberto Gonzalez
2020-03-19
1
-60
/
+56
*
substr() -> compare()
Eddie Hung
2019-08-07
1
-2
/
+2
*
Use State::S{0,1}
Eddie Hung
2019-08-06
1
-1
/
+1
*
Add "techmap -wb", use in formal flows
Clifford Wolf
2019-04-20
1
-4
/
+4
*
Consistent use of 'override' for virtual methods in derived classes.
Henner Zeller
2018-07-20
1
-2
/
+2
*
Bugfix in "miter -assert" handling of assumptions
Clifford Wolf
2016-10-17
1
-2
/
+2
*
Added $ff and $_FF_ cell types
Clifford Wolf
2016-10-12
1
-7
/
+31
*
Added "yosys -D" feature
Clifford Wolf
2016-04-21
1
-2
/
+2
*
Renamed opt_const to opt_expr
Clifford Wolf
2016-03-31
1
-4
/
+4
*
Spell check (by Larry Doolittle)
Clifford Wolf
2015-08-14
1
-1
/
+1
*
Added "miter -assert"
Clifford Wolf
2015-07-25
1
-1
/
+93
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
1
-4
/
+4
*
namespace Yosys
Clifford Wolf
2014-09-27
1
-1
/
+5
*
Use "-keepdc" in "miter -equiv -flatten"
Clifford Wolf
2014-08-07
1
-2
/
+2
*
More bugfixes related to new RTLIL::IdString
Clifford Wolf
2014-08-02
1
-3
/
+3
*
Renamed port access function on RTLIL::Cell, added param access functions
Clifford Wolf
2014-07-31
1
-28
/
+28
*
Added module->design and cell->module, wire->module pointers
Clifford Wolf
2014-07-31
1
-1
/
+1
*
Refactoring: Renamed RTLIL::Design::modules to modules_
Clifford Wolf
2014-07-27
1
-6
/
+6
*
Refactoring: Renamed RTLIL::Module::wires to wires_
Clifford Wolf
2014-07-27
1
-7
/
+7
*
Changed a lot of code to the new RTLIL::Wire constructors
Clifford Wolf
2014-07-26
1
-18
/
+5
*
Manual fixes for new cell connections API
Clifford Wolf
2014-07-26
1
-4
/
+4
*
Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
1
-29
/
+29
*
Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
1
-29
/
+29
*
Use only module->addCell() and module->remove() to create and delete cells
Clifford Wolf
2014-07-25
1
-41
/
+10
*
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
Clifford Wolf
2014-07-23
1
-1
/
+1
*
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
Clifford Wolf
2014-07-23
1
-1
/
+1
*
SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
1
-4
/
+4
*
SigSpec refactoring: renamed chunks and width to __chunks and __width
Clifford Wolf
2014-07-22
1
-4
/
+4
*
Removed deprecated module->new_wire()
Clifford Wolf
2014-07-21
1
-6
/
+6
*
Added "miter -equiv -flatten"
Clifford Wolf
2014-07-20
1
-0
/
+14
*
added log_header to miter and expose pass, show cell type for exposed ports
Johann Glaser
2014-05-28
1
-0
/
+4
*
Added miter -make_outcmp
Clifford Wolf
2014-02-06
1
-2
/
+23
*
Fixed a bug in miter command
Clifford Wolf
2014-02-01
1
-2
/
+2
*
Added miter command
Clifford Wolf
2014-02-01
1
-0
/
+306