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* proc_rom: Add special handling of const-0 address bits.Marcelina Kościelnicka2022-05-181-15/+40
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* Add proc_rom pass.Marcelina Kościelnicka2022-05-133-0/+239
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* proc_dff: Emit $aldff.Marcelina Kościelnicka2021-10-271-32/+7
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* proc_prune: Make assign removal and promotion per-bit, remember promoted bits.Marcelina Kościelnicka2021-08-141-40/+25
| | | | Fixes #2962.
* proc_memwr: Use the v2 memwr cell.Marcelina Kościelnicka2021-08-111-9/+19
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* proc_rmdead: use explicit pattern set when there are no wildcardsZachary Snow2021-07-291-2/+63
| | | | | | | | If width of a case expression was large, explicit patterns could cause the existing logic to take an extremely long time, or exhaust the maximum size of the underlying set. For cases where all of the patterns are fully defined and there are no constants in the case expression, this change uses a simple set to track which patterns have been seen.
* proc: Run opt_expr at the endMarcelina Kościelnicka2021-07-271-0/+11
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* Delete unused found_init variableRupert Swarbrick2021-07-141-3/+0
| | | | | | | Spotted during compilation: passes/proc/proc_init.cc: In function ‘void {anonymous}::proc_init(Yosys::RTLIL::Module*, Yosys::SigMap&, Yosys::RTLIL::Process*)’: passes/proc/proc_init.cc:31:7: warning: variable ‘found_init’ set but not used [-Wunused-but-set-variable]
* rtlil: Make Process handling more uniform with Cell and Wire.Marcelina Kościelnicka2021-07-121-5/+4
| | | | | | - add a backlink to module from Process - make constructor and destructor protected, expose Module functions to add and remove processes
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-088-8/+8
| | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
* proc_arst: Add special-casing of clock signal in conditionals.Marcelina Kościelnicka2021-03-151-23/+51
| | | | | | | | | | | | | | | | | The already-existing special case for conditionals on clock has been remade as follows: - now triggered for the last remaining edge trigger after all others have been converted to async reset, not just when there is only one sync rule in the first place - does not require all contained assignments to be constant, as opposed to a reset conditional — merely const-folds the condition In addition, the code has been refactored a bit; as a bonus, the priority order of async resets found is now preserved in resulting sync rule ordering (though this is not yet respected by proc_dff). Fixes #2656.
* Add support for memory writes in processes.Marcelina Kościelnicka2021-03-087-37/+151
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* proc_dff: Fix emitted FF when a register is not assigned in async resetMarcelina Kościelnicka2021-03-081-0/+4
| | | | Fixes #2619.
* proc_clean: Fix empty case removal conditions.Marcelina Kościelnicka2021-03-061-10/+21
| | | | Fixes #2639.
* proc: Add -nomux switchPeder Bergebakken Sundt2020-08-201-1/+10
| | | | running proc -nomux will ommit the proc_mux pass
* proc_dlatch: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-28/+8
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* proc_dlatch: Remove init values for combinatorial processes.Marcelina Kościelnicka2020-07-121-0/+33
| | | | Fixes #2258.
* Use C++11 final/override keywords.whitequark2020-06-189-18/+18
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* kernel: big fat patch to use more ID::*, otherwise ID(*)Eddie Hung2020-04-025-96/+96
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* kernel: use more ID::*Eddie Hung2020-04-026-90/+90
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* kernel: SigSpec use more const& + overloads to prevent implicit SigSpecEddie Hung2020-03-131-1/+1
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* proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usageDavid Shah2019-11-211-4/+16
| | | | Signed-off-by: David Shah <dave@ds0.me>
* proc_clean: fix order of switch insertion.whitequark2019-08-191-2/+1
| | | | Fixes #1268.
* Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-101-2/+2
|\ | | | | Cleanup a few barnacles across codebase
| * Make liberal use of IdString.in()Eddie Hung2019-08-061-2/+2
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* | proc_prune: fix handling of exactly identical assigns.whitequark2019-08-081-9/+7
|/ | | | | | | | | | | | | | | | | Before this commit, in a process like: process $proc$bug.v:8$3 assign $foo \bar switch \sel case 1'1 assign $foo 1'1 assign $foo 1'1 case assign $foo 1'0 end end both of the "assign $foo 1'1" would incorrectly be removed. Fixes #1243.
* proc_prune: Promote partially redundant assignments.Jean-François Nguyen2019-08-011-2/+11
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* Merge pull request #1168 from whitequark/bugpoint-processesClifford Wolf2019-07-091-8/+24
|\ | | | | Add support for processes in bugpoint
| * proc_clean: add -quiet option.whitequark2019-07-091-8/+24
| | | | | | | | This is useful for other passes that call it often, like bugpoint.
* | Merge pull request #1169 from whitequark/more-proc-cleanupsClifford Wolf2019-07-095-22/+168
|\ \ | | | | | | A new proc_prune pass
| * | proc_prune: promote assigns to module connections when legal.whitequark2019-07-093-33/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This can pave the way for further transformations by exposing identities that were previously hidden in a process to any pass that uses SigMap. Indeed, this commit removes some ad-hoc logic from proc_init that appears to have been tailored to the output of genrtlil in favor of using `SigMap.apply()`. (This removal is not optional, as the ad-hoc logic cannot cope with the result of running proc_prune; a similar issue was fixed in proc_arst.)
| * | proc_prune: new pass.whitequark2019-07-093-1/+138
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The proc_prune pass is similar in nature to proc_rmdead pass: while proc_rmdead removes branches that never become active because another branch preempts it, proc_prune removes assignments that never become active because another assignment preempts them. Genrtlil contains logic similar to the proc_prune pass, but their purpose is different: genrtlil has to prune assignments to adapt the semantics of blocking assignments in HDLs (latest assignment wins) to semantics of assignments in RTLIL processes (assignment in the most specific case wins). On the other hand proc_prune is a general purpose RTLIL simplification that benefits all frontends, even those not using the Yosys AST library. The proc_prune pass is added to the proc script after proc_rmdead, since it gives better results with fewer branches.
* / proc_mux: consider \src attribute on CaseRule.whitequark2019-07-081-10/+16
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* Improve proc full_case detection and handling, fixes #931Clifford Wolf2019-04-182-5/+63
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Revert #895Eddie Hung2019-04-161-28/+0
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* Revert "Recognise default entry in case even if all cases covered (fix for ↵Eddie Hung2019-04-151-1/+1
| | | | #931)"
* Recognise default entry in case even if all cases covered (#931)Eddie Hung2019-04-111-1/+1
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* proc_mux: Fix crash when trying to optimize non-existant mux to shiftxSylvain Munaut2019-04-031-1/+1
| | | | | | last_mux_cell can be NULL ... Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* Create one $shiftx per bit in widthEddie Hung2019-03-251-10/+17
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* Add a pmux-to-shiftx optimisation to proc_muxEddie Hung2019-03-231-0/+21
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* proc_clean: fix critical typo.whitequark2019-01-231-1/+1
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* proc_clean: fix fully def check to consider compare/signal length.whitequark2019-01-181-1/+7
| | | | Fixes #790.
* proc_clean: remove any empty cases if all cases use all-def compare.whitequark2018-12-231-6/+28
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* proc_clean: remove any empty cases at the end of the switch.whitequark2018-12-221-7/+3
| | | | Previously, only completely empty switches were removed.
* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-208-16/+16
| | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* Add warnings for driver-driver conflicts between FFs (and other cells) and ↵Clifford Wolf2017-12-121-2/+3
| | | | constants
* Add src attribute to extra cells generated by proc_dlatchClifford Wolf2017-09-091-7/+9
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* Added $global_clock verilog syntax support for creating $ff cellsClifford Wolf2016-10-141-7/+19
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* Added "proc_mux -ifx"Clifford Wolf2016-06-062-19/+43
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* Fix all undef-muxes in dlatch input coneClifford Wolf2016-06-021-34/+72
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