aboutsummaryrefslogtreecommitdiffstats
path: root/passes/pmgen
Commit message (Expand)AuthorAgeFilesLines
...
* Try recursive pmgen for P cascadeEddie Hung2019-09-261-88/+118
* CREG to check for \keepEddie Hung2019-09-261-0/+3
* Remove newlineEddie Hung2019-09-261-1/+0
* Do not die if DSP48E1.P has no users (would otherwise get 'clean'-ed)Eddie Hung2019-09-251-1/+5
* Reject if (* init *) presentEddie Hung2019-09-252-0/+6
* Rework xilinx_dsp postAdd for new wreduce callEddie Hung2019-09-251-3/+3
* Fix memory issue since SigSpec& could be invalidatedEddie Hung2019-09-251-6/+10
* unextend only used in initEddie Hung2019-09-251-2/+1
* Call 'wreduce' after mul2dsp to avoid unextend()Eddie Hung2019-09-251-5/+4
* Set [AB]CASCREG to legal valuesEddie Hung2019-09-231-6/+10
* Comment to explain separating CREG packingEddie Hung2019-09-231-0/+8
* Separate out CREG packing into new pattern, to avoid conflict with PREGEddie Hung2019-09-234-46/+273
* Move log_debug("\n") laterEddie Hung2019-09-231-1/+1
* Move unextend initialisation laterEddie Hung2019-09-231-12/+9
* Use new port() overload once moreEddie Hung2019-09-231-2/+2
* Use new port/param overload in pmgEddie Hung2019-09-204-22/+22
* Output pattern matcher items as log_debug()Eddie Hung2019-09-202-31/+27
* OPMODE is port not paramEddie Hung2019-09-201-7/+6
* Do not run xilinx_dsp_cascadeAB for nowEddie Hung2019-09-201-1/+2
* WIP for xiinx_dsp_cascadeABEddie Hung2019-09-201-3/+499
* Run until convergenceEddie Hung2019-09-201-3/+9
* Cleanup ice40_dsp.pmgEddie Hung2019-09-201-12/+6
* Cleanup xilinx_dspEddie Hung2019-09-201-1/+1
* More exceptionsEddie Hung2019-09-201-2/+2
* Update docEddie Hung2019-09-201-2/+2
* Add a xilinx_dsp_cascade matcher for PCIN -> PCOUTEddie Hung2019-09-204-54/+105
* Add an overload for port/param with default valueEddie Hung2019-09-201-0/+8
* Small cleanupEddie Hung2019-09-201-19/+18
* Disable support for SB_MAC16 reset since it is asyncEddie Hung2019-09-192-3/+7
* SB_MAC16 ffCD to not pack same as ffOEddie Hung2019-09-191-2/+2
* ClarifyEddie Hung2019-09-191-1/+2
* Update doc for ice40_dspEddie Hung2019-09-191-1/+10
* Add an indexEddie Hung2019-09-192-0/+3
* Fix width of DEddie Hung2019-09-191-1/+1
* Use ID() macroEddie Hung2019-09-192-210/+210
* Re-enable sign extension for C inputEddie Hung2019-09-191-4/+4
* Do not perform width-checks for DSP48E1 which is much more complicatedEddie Hung2019-09-191-11/+0
* Remove TODO as check should not be necessaryEddie Hung2019-09-191-1/+0
* Revert index to selectEddie Hung2019-09-191-1/+1
* Cleanup xilinx_dsp tooEddie Hung2019-09-191-37/+28
* Refactor ce{mux,pol} -> hold{mux,pol}Eddie Hung2019-09-192-77/+77
* Add HOLD/RST support for SB_MAC16Eddie Hung2019-09-192-69/+116
* Add support for SB_MAC16 CD and H registersEddie Hung2019-09-192-13/+73
* Refactor ice40_dsp.pmgEddie Hung2019-09-192-194/+426
* CleanupEddie Hung2019-09-191-8/+4
* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-182-13/+18
|\
| * Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxextEddie Hung2019-09-183-0/+115
| |\
| | * Revert "Make one check $shift(x)? only; change testcase to be 8b"Eddie Hung2019-09-131-3/+2
| | * Tidy upEddie Hung2019-09-111-10/+16
| | * Fix UBEddie Hung2019-09-111-2/+2