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* Fix enable polarityEddie Hung2019-09-061-2/+2
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* Logging for ffADEddie Hung2019-09-061-0/+3
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* Add support for pre-adder and AD registerEddie Hung2019-09-061-1/+30
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* Sensitive to CEB CEM CEP polarityEddie Hung2019-09-051-5/+8
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* ffAmuxAB -> ffAenpolEddie Hung2019-09-051-2/+3
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* Do not check signedness of post-adder (assume taken care of by DSP)Eddie Hung2019-09-051-2/+0
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* Do not make ff[MP]mux semioptional, use sigmapEddie Hung2019-09-051-2/+5
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* Add support for CEPEddie Hung2019-09-051-17/+16
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* Add support for CEB, remove check on nusersEddie Hung2019-09-051-7/+12
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* Support CEAEddie Hung2019-09-051-6/+11
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* Get rid of sigBset tooEddie Hung2019-09-041-4/+0
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* Get rid of sigPusedEddie Hung2019-09-041-2/+0
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* Support CEMEddie Hung2019-09-041-4/+6
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* st.ffP from if to assertEddie Hung2019-09-031-1/+2
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* Rename muxAB to postAddMuxEddie Hung2019-09-031-11/+11
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* Use choices for addAB, now called postAddEddie Hung2019-09-031-6/+6
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* Add support for load value into DSP48E1.PEddie Hung2019-09-031-1/+6
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* Process post-adder first since C could be used for load-PEddie Hung2019-09-031-18/+22
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* Use feedback path for MACCEddie Hung2019-09-031-15/+21
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* autoremove ffMEddie Hung2019-08-301-0/+1
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* ffM before addABEddie Hung2019-08-301-1/+1
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* Another oopsEddie Hung2019-08-301-1/+1
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* Update commented outEddie Hung2019-08-301-1/+1
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* Add support for ffMEddie Hung2019-08-301-0/+12
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* Perform C -> PCIN optimisation after pattern matcherEddie Hung2019-08-131-10/+57
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* Rename to XilinxDspPassEddie Hung2019-08-131-3/+3
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* Pack partial-product adder DSP48E1 packingEddie Hung2019-08-091-5/+17
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* Remove muxY and ffY for nowEddie Hung2019-08-081-5/+5
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* Disable $dffeEddie Hung2019-08-081-8/+8
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* Pack P register properlyEddie Hung2019-08-011-2/+4
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* Fine tune ice40_dsp.pmg, add support for packing subsets of registersEddie Hung2019-07-191-1/+1
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* Do not autoremove ffP aor muxPEddie Hung2019-07-181-2/+0
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* Improve pattern matcher to match subsets of $dffe? cellsEddie Hung2019-07-181-2/+8
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* Improve A/B reg packingEddie Hung2019-07-181-0/+3
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* Do not autoremove A/B registers since they might have other consumersEddie Hung2019-07-181-2/+0
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* Pattern matcher to check pool of bits, not exactlyEddie Hung2019-07-171-3/+9
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* Signed extensionEddie Hung2019-07-161-2/+2
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* Add support {A,B,P}REG packingEddie Hung2019-07-161-26/+42
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* Add xilinx_dsp for register packingEddie Hung2019-07-151-0/+120