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passes
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memory
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memory_collect.cc
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Author
Age
Files
Lines
*
Use only module->addCell() and module->remove() to create and delete cells
Clifford Wolf
2014-07-25
1
-12
/
+6
*
Replaced more old SigChunk programming patterns
Clifford Wolf
2014-07-24
1
-5
/
+5
*
Removed RTLIL::SigSpec::optimize()
Clifford Wolf
2014-07-23
1
-7
/
+0
*
SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
1
-16
/
+16
*
SigSpec refactoring: renamed chunks and width to __chunks and __width
Clifford Wolf
2014-07-22
1
-16
/
+16
*
Changes to "memory" pass for new $memwr/$mem WR_EN interface
Clifford Wolf
2014-07-16
1
-2
/
+2
*
Fixed bug in collecting of RD_TRANSPARENT parameter in memory_collect
Clifford Wolf
2014-02-08
1
-0
/
+1
*
Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)
Clifford Wolf
2014-02-03
1
-2
/
+7
*
Added correct handling of $memwr priority
Clifford Wolf
2014-01-03
1
-2
/
+19
*
Replaced RTLIL::Const::str with generic decoder method
Clifford Wolf
2013-12-04
1
-2
/
+2
*
Added help messages to memory_* passes
Clifford Wolf
2013-03-01
1
-7
/
+23
*
initial import
Clifford Wolf
2013-01-05
1
-0
/
+182