index
:
iCE40/yosys
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
passes
/
fsm
/
fsmdata.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
Avoid unnecessary copy of a potential large constant value.
Henner Zeller
2022-06-09
1
-2
/
+2
*
Fixing old e-mail addresses and deadnames
Claire Xenia Wolf
2021-06-08
1
-1
/
+1
*
kernel: big fat patch to use more ID::*, otherwise ID(*)
Eddie Hung
2020-04-02
1
-23
/
+23
*
Import more std:: stuff into Yosys namespace
Clifford Wolf
2015-10-25
1
-1
/
+1
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
1
-2
/
+2
*
Renamed SIZE() to GetSize() because of name collision on Win32
Clifford Wolf
2014-10-10
1
-4
/
+4
*
namespace Yosys
Clifford Wolf
2014-09-27
1
-2
/
+5
*
Renamed port access function on RTLIL::Cell, added param access functions
Clifford Wolf
2014-07-31
1
-2
/
+2
*
Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
1
-2
/
+2
*
Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
1
-2
/
+2
*
Various small fixes (from gcc compiler warnings)
Clifford Wolf
2014-07-23
1
-4
/
+4
*
SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commands
Clifford Wolf
2014-07-22
1
-8
/
+6
*
SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
1
-4
/
+4
*
SigSpec refactoring: renamed chunks and width to __chunks and __width
Clifford Wolf
2014-07-22
1
-4
/
+4
*
Replaced RTLIL::Const::str with generic decoder method
Clifford Wolf
2013-12-04
1
-1
/
+1
*
initial import
Clifford Wolf
2013-01-05
1
-0
/
+177