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* rtlil: Make Process handling more uniform with Cell and Wire.Marcelina Koƛcielnicka2021-07-121-6/+4
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-081-1/+1
* kernel/rtlil: Extract some helpers for checking memory cell types.Marcelina Koƛcielnicka2021-05-221-1/+1
* Use C++11 final/override keywords.whitequark2020-06-181-2/+2
* Clean up `passes/cmds/delete.cc`.Alberto Gonzalez2020-04-061-24/+19
* kernel: big fat patch to use more ID::*, otherwise ID(*)Eddie Hung2020-04-021-2/+2
* More use of IdString::in()Eddie Hung2019-08-151-1/+1
* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-201-2/+2
* Fixed trailing whitespacesClifford Wolf2015-07-021-3/+3
* Renamed hashmap.h to hashlib.h, some related improvementsClifford Wolf2014-12-281-2/+2
* More hashtable finetuningClifford Wolf2014-12-271-2/+2
* Replaced std::unordered_set (nodict) with Yosys::poolClifford Wolf2014-12-261-4/+4
* Added Yosys::{dict,nodict,vector} container typesClifford Wolf2014-12-261-4/+4
* namespace YosysClifford Wolf2014-09-271-3/+5
* Preparations for RTLIL::IdString redesign: cleanup of existing codeClifford Wolf2014-08-021-3/+3
* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-271-3/+3
* Refactoring: Renamed RTLIL::Module::cells to cells_Clifford Wolf2014-07-271-1/+1
* Refactoring: Renamed RTLIL::Module::wires to wires_Clifford Wolf2014-07-271-2/+2
* Changed a lot of code to the new RTLIL::Wire constructorsClifford Wolf2014-07-261-30/+5
* Use only module->addCell() and module->remove() to create and delete cellsClifford Wolf2014-07-251-5/+4
* Fixed all users of SigSpec::chunks_rw() and removed itClifford Wolf2014-07-231-2/+3
* SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created...Clifford Wolf2014-07-221-1/+1
* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-221-1/+1
* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-221-1/+1
* Removed deprecated module->new_wire()Clifford Wolf2014-07-211-1/+1
* Added delete {-input|-output|-port}Clifford Wolf2014-02-091-5/+36
* Bugfix in delete commandClifford Wolf2014-02-091-1/+3
* Added delete commandClifford Wolf2014-02-021-0/+134