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path: root/manual/CHAPTER_CellLib.tex
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* Removing manual filesKrystalDelusion2022-12-081-1007/+0
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* Add the $anyinit cell and the formalff passJannis Harder2022-08-161-1/+1
| | | | | | | These can be used to protect undefined flip-flop initialization values from optimizations that are not sound for formal verification and can help mapping all solver-provided values in witness traces for flows that use different backends simultaneously.
* Add $aldff and $aldffe: flip-flops with async load.Marcelina Kościelnicka2021-10-021-2/+13
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* Add v2 memory cells.Marcelina Kościelnicka2021-08-111-27/+99
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* memory: Introduce $meminit_v2 cell, with EN input.Marcelina Kościelnicka2021-07-281-5/+6
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* Add latches to the manual.Marcelina Kościelnicka2020-06-261-42/+165
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* Add a few more gate types to the manual.Marcelina Kościelnicka2020-06-261-8/+36
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* Add new builtin FF typesMarcelina Kościelnicka2020-06-231-28/+178
| | | | | | | | | | | | | | The new types include: - FFs with async reset and enable (`$adffe`, `$_DFFE_[NP][NP][01][NP]_`) - FFs with sync reset (`$sdff`, `$_SDFF_[NP][NP][01]_`) - FFs with sync reset and enable, reset priority (`$sdffs`, `$_SDFFE_[NP][NP][01][NP]_`) - FFs with sync reset and enable, enable priority (`$sdffce`, `$_SDFFCE_[NP][NP][01][NP]_`) - FFs with async reset, set, and enable (`$dffsre`, `$_DFFSRE_[NP][NP][NP][NP]_`) - latches with reset or set (`$adlatch`, `$_DLATCH_[NP][NP][01]_`) The new FF types are not actually used anywhere yet (this is left for future commits).
* Document division and modulo cellsXiretza2020-05-281-0/+23
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* Merge pull request #1553 from whitequark/manual-dffxClaire Wolf2020-01-281-11/+90
|\ | | | | Document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells
| * manual: document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells.whitequark2019-12-051-11/+90
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* | manual: document behavior of many comb cells more precisely.whitequark2019-12-041-35/+56
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* Add $_NMUX_, add "abc -g cmos", add proper cmos cell costsClifford Wolf2019-08-061-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add $specrule cells for $setup/$hold/$skew specify rulesClifford Wolf2019-04-231-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add CellTypes support for $specify2 and $specify3Clifford Wolf2019-04-231-0/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* manual: document some gates.whitequark2019-01-141-9/+11
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* manual: explain $tribuf cell.whitequark2019-01-141-0/+10
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* Fix typo in manualClifford Wolf2019-01-071-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* manual: make description of $meminit ports match reality.whitequark2018-12-211-3/+15
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* manual: fix typos.whitequark2018-12-201-2/+2
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* manual: document $meminit cell and memory_* passes.whitequark2018-12-201-6/+21
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* Add $allconst and $allseq cell typesClifford Wolf2018-02-231-1/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add $_ANDNOT_ and $_ORNOT_ gatesClifford Wolf2017-05-171-1/+2
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* Add $live and $fair cell types, add support for s_eventually keywordClifford Wolf2017-02-251-1/+1
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* Add $cover cell type and SVA cover() supportClifford Wolf2017-02-041-1/+1
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* Added $anyseq cell typeClifford Wolf2016-10-141-1/+1
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* Added $ff and $_FF_ cell typesClifford Wolf2016-10-121-0/+4
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* Removed $aconst cell typeClifford Wolf2016-08-301-1/+1
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* Removed $predict againClifford Wolf2016-08-281-1/+1
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* Added $anyconst and $aconstClifford Wolf2016-07-271-1/+1
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* Added $initstate cell type and vlog functionClifford Wolf2016-07-211-1/+1
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* After reading the SV spec, using non-standard predict() instead of expect()Clifford Wolf2016-07-211-1/+1
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* Added basic support for $expect cellsClifford Wolf2016-07-131-1/+1
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* Added $sop cell type and "abc -sop"Clifford Wolf2016-06-171-0/+4
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* Added read-enable to memory modelClifford Wolf2015-09-251-2/+6
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* Spell check (by Larry Doolittle)Clifford Wolf2015-08-141-2/+2
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* Added $assume cell typeClifford Wolf2015-02-261-1/+1
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* Added $equiv cell typeClifford Wolf2015-01-191-1/+1
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* Added more documentation fixmes for nontrivial register cellsClifford Wolf2014-12-081-1/+9
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* Added $lcu cell typeClifford Wolf2014-09-081-1/+1
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* Removed $bu0 cell typeClifford Wolf2014-09-041-6/+0
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* Added $alu cell typeClifford Wolf2014-08-301-0/+4
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* Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ ↵Clifford Wolf2014-08-161-0/+4
| | | | $_OAI4_
* Renamed $_INV_ cell type to $_NOT_Clifford Wolf2014-08-151-2/+2
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* Removed old doc references to $safe_pmuxClifford Wolf2014-08-151-4/+0
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* Changed the $mem/$memwr WR_EN input to a per-data-bit enable signalClifford Wolf2014-07-161-3/+4
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* Added $slice and $concat cell typesClifford Wolf2014-02-071-0/+4
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* Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)Clifford Wolf2014-02-031-0/+7
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* Added $assert cellClifford Wolf2014-01-191-0/+4
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* Added correct handling of $memwr priorityClifford Wolf2014-01-031-0/+3
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